Electric heating – Heating devices – Combined with container – enclosure – or support for material...
Reexamination Certificate
2001-08-23
2004-06-22
Fuqua, Shawntina (Department: 3742)
Electric heating
Heating devices
Combined with container, enclosure, or support for material...
C219S405000, C219S411000, C118S724000, C118S725000, C118S050100, C118S729000, C118S730000, C392S416000, C392S418000
Reexamination Certificate
active
06753506
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a system and method for thermal processing of a workpiece, and more particularly relates to a system and method for regulating a processing temperature of the workpiece, and reducing an amount of process gas required to process the workpiece as well as the corresponding gas switching and purge time.
BACKGROUND OF THE INVENTION
Devices for thermal processing have been widely known and utilized to perform a variety of thermal processing methods, including annealing, diffusion, oxidation, and chemical vapor deposition. A common workpiece fabricated utilizing such thermal processing devices is a semiconductor wafer. One of ordinary skill in the art understands these thermal processing devices, especially with regard to the impact of process variables on the quality and uniformity of resulting products.
Single wafer rapid thermal processing (RTP) is a known method for physically and chemically treating semiconductor wafers at high temperatures to achieve desired electronic properties for semiconductor devices. The RTP process typically uses two techniques for heating the wafers. In a first technique, a steady-state hot-wall furnace heats a wafer and the wafer temperature is controlled by the mechanical transport of the wafer along a temperature, or thermal radiation, gradient. In a second technique, a wafer is heated by incandescent, or arc, lamps around a cold wall chamber, and the wafer temperature is controlled by varying the optical output of each lamp.
In a second technique, lamp-based RTP systems can heat and cool a wafer at relatively fast ramp-up and ramp-down rates due to the relatively low thermal mass associated with lamps, which offers a low thermal budget (namely the integration of temperature over time) for wafer processing. The temperature control of a wafer inside a lamp-based RTP depends on the fast switching (on and off) of multiple lamps in response to the temperature readings at one or several locations on the wafer. This process necessitates the use of complex optical and electronic feedback and control systems to achieve the required temperature accuracy and uniformity. A wafer being processed is not in thermal equilibrium with its colder surroundings. This, in combination with the random nature of lamp output control, makes the temperature uniformity and reproducibility of a lamp-based RTP difficult. However, since no lateral transport of a wafer inside an RTP chamber is required except for rotation along the wafer normal, a lamp-based system inherently possesses a small chamber volume (about or below 10 liters) relative to a hot-wall-based RTP furnace (about 100 liters). Thus, fast gas switching can be realized by a lamp-based RTP system during a rapid thermal processing cycle, such that a wafer can be consecutively exposed to different ambient gases in synchronization with the wafer temperature. However, known hot-wall RTP systems do not have the advantage of fast gas switching.
A commercially available hot-wall RTP furnace is described in the U.S. Pat. No. 4,857,689 awarded to High Temperature Engineering Corporation, and has been improved by the addition of an in situ emissivity calibration and closed-loop temperature control system as described in U.S. Pat. No. 6,183,127 awarded to Eaton Corporation (SEO).
To further describe hot-wall RTP systems, an upper section of the hot-wall RTP furnace is constantly heated, while a lower section is actively cooled to maintain a steady-state temperature profile. An ambient gas is continuously introduced into the upper section of the furnace and exhausts from the lower section of the furnace. Consequently, a monotonic temperature and thermal radiation gradient exists along the axis of the RTP furnace. The temperature profile is also axially symmetric, with a radial component optimized to ensure the uniform heating of a wafer. Varying the position of the wafer along the temperature gradient controls the heating of the wafer. Since a thermal steady-state is maintained throughout the entire furnace, and between the furnace and the gas ambient, wafer heating is dominated by the thermal equilibration between the wafer and its furnace environment. Consequently, a hot-wall RTP furnace can yield superior results over the lamp-based RTP systems in terms of temperature uniformity, process reproducibility, and cost, while still possessing comparable performance with regard to thermal budget and process throughput. The hot-wall RTP furnace systems have successfully been used in production for implant anneal and activation, silicidation, dry- and wet-silicon oxide growth, diffusion, and metal anneal.
In comparison with the lamp-based RTP systems, however, the hot-wall RTP systems maintain larger furnace internal volumes. This is because a wafer must travel a span of up to 100 cm to make use of the furnace temperature gradient for temperature variation and control. Hence, the furnace must be sufficiently large to accommodate the large sweep volume of the wafer. For example, the sweep volumes for the 200 mm and 300 mm wafers are approximately 31 and 71 liters, respectively, for a 100 cm sweep, leading to a typical furnace volume of about 100 liters. If the fast switching of ambient gases is required for the processes involving the consecutive applications of multiple ambient gases in a RTP cycle, such fast switching can be difficult. In addition, a large chamber volume tends to increase process gas consumption, wafer contamination levels due to the out-diffusing impurities from hot furnace materials, and safety risks because of the quantities of toxic, corrosive, flammable or explosive process gases at high temperatures.
Since the inception of the RTP processing, some development has focused on techniques to increase the temperature ramp-up and ramp-down rates of a wafer to minimize the thermal budget. Additional development has focused on the accurate temperature measurement and control of wafers. The thermal budget of a rapid thermal annealing (RTA) step directly determines the source/drain junction depth and sheet resistance of CMOS devices through defect annealing, re-crystallization, dopant activation, and diffusion in the implanted layers. In addition to the thermal budget control, fast gas switching capabilities are becoming increasingly important in the RTP processes as the vigorous device scaling necessitates the replacement of a silicon oxide (SiO
2
) dielectric layer with a layered gate dielectric stacks containing silicon oxide, silicon oxynitride (SiO
x
N
y
), and silicon nitride (Si
3
N
4
), and with high-K dielectric materials in the future. In a two-step RTO process for SiO
2
growth (see J. Nulman, J. P. Krusius and P. Renteln, Mat. Res. Soc., Symp. Proc., 52, 341(1985)), for example, a wafer is heated in an oxygen ambient to a preset temperature, and further to a higher temperature, for silicon oxide growth. An RTA is then performed after switching the ambient from oxygen to nitrogen. The RTA step improves the electrical properties of the Si—SiO
2
interface.
As another example, the formation of an ultra-thin nitride gate stack by in situ RTP multiprocessing (see S. C. Song, B. Y. Kim, H. F. Luan and D. L. Kwong, M. Gardner, J. Fulford, D. Wristers, J. Gelpey and S. Marcus, Advances in rapid thermal processing, ECS Proceedings of the symposium, V99-100, p45(1999)) requires four consecutive steps in different ambient gases and at different temperatures, namely (1) interface passivation in nitric oxide (NO) gas, (2) silicon nitride (Si
3
N
4
) rapid thermal chemical vapor deposition (RTCVD) using silane (SiH
4
) and ammonia (NH
3
) at a low pressure, (3) nitridation in ammonia, and (4) anneal in nitrous oxide (N
2
O). Therefore, the prolonged purge time between two consecutive RTP steps, which is necessary for an RTP chamber with a large internal volume, will reduce the RTP process throughput.
Vertical-type thermal processing furnaces typically support a processing tube within the furnace in a vertical position. The thermal processing furnace also typically employs a
Drislane William Francis
Hebb Jeffrey P.
Liu Yong
Axcelis Technologies
Detweiler, Esq. Sean D.
Fuqua Shawntina
Lahive & Cockfield LLP
Laurentano, Esq. Anthony A.
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