System and method of evaluating gate oxide integrity for...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

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06963206

ABSTRACT:
The present invention provides a system and method for evaluating gate oxide integrity in a semiconductor wafer. The system may include: a semiconductor wafer; a layer of gate oxide on the semiconductor wafer; a layer of polysilicon on the gate oxide; an electron beam microscope with adjustable energy levels, wherein the electron beam is directed at the semiconductor wafer; an electron beam inspection tool used to detect passive voltage contrasts within the gate oxide layer. The system may also include a measuring tool for measuring an electrical current level of the semiconductor substrate. The system may also include an electrical ground connected to the semiconductor wafer. The system may also include the energy levels vary from about 600 eV to 5000 eV.

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Cappel et al., “The Advantages of In-Line Electron-Beam Wafer Inspection”, Summer 2000, Yield Management Solutions, pp. 9-12.
Liang et al. “Rapid in-line characterization of plasma-induced damage on a 0.25 um CMOS ASIC technology”, Jun. 1998, 3rdInternational Symposium on Plasma Process-Induced Damage, 1998, pp. 148-151.
Colvin, “A New Technique to Rapidly Identify Gate Oxide Leakage in Field Effect Semiconductors Using a Scanning Electron Microscope,”, 1990, EOS/ESD Symposium, pp. 331-336.

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