System and method of electrostatic discharge protection for...

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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C361S091100, C361S111000

Reexamination Certificate

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07859806

ABSTRACT:
System and method for protecting an integrated circuit. The system includes a first transistor coupled to a first voltage and a second voltage, a second transistor coupled to the gate of the first transistor and the first voltage, a third transistor coupled to the gate of the second transistor and the first voltage, and a capacitor coupled to the gate of the second transistor and the second voltage. The first voltage is provided to the integrated circuit, the gate of the third transistor is configured to receive a first control signal, the gate of the second transistor is configured to receive a second control signal, and the second control signal is capable of turning off the second transistor a time period after the third transistor is turned off.

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patent: 2006/0152870 (2006-07-01), Chen et al.
patent: 2006/0209479 (2006-09-01), Grombach et al.
patent: 803955 (1997-10-01), None

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