Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-12-12
2006-12-12
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C365S185180
Reexamination Certificate
active
07149119
ABSTRACT:
A system and method of controlling a three dimensional memory is disclosed. In a particular embodiment, the system is implemented as an integrated circuit including a microcontroller having a control signal output, a three-dimensional monolithic non-volatile memory having a plurality of levels of memory cells above a silicon substrate and having an input responsive to the control signal output, a counter coupled to the microcontroller, and a program memory. The counter is to step through a series of time steps defining a program pulse time interval of a first program pulse to be applied to at least one selected memory cell within the three-dimensional monolithic non-volatile memory. The program memory is accessible to the microcontroller, and the program memory includes a sequence of program instructions corresponding to a memory operation with respect to the three-dimensional monolithic non-volatile memory.
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Matrix Semiconductor Inc.
Nguyen Tan T.
Toler Schaffer LLP
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