Computer graphics processing and selective visual display system – Display driving control circuitry – Adjusting display pixel size or pixels per given area
Reexamination Certificate
2000-01-07
2003-07-22
Shalwala, Bipin (Department: 2613)
Computer graphics processing and selective visual display system
Display driving control circuitry
Adjusting display pixel size or pixels per given area
C345S100000, C345S213000
Reexamination Certificate
active
06597373
ABSTRACT:
FIELD
The invention generally relates to computer graphics and in particular to a system and method of aligning images for display devices.
BACKGROUND
The Video Graphics Array (VGA) is the established color graphics card of choice for the Personal Computer (PC) family of computers. Millions of Enhanced Graphics Array (EGA) and VGA cards are in use worldwide. VGA controllers have penetrated every PC platform, from laptops through workstations. The Super VGA (SVGA) standard, an extension of the original VGA, offers new and more powerful graphics features. Software applications using VGA and SVGA have expanded from the early illustration and graphics packages to include workstation resolution computer aided design (CAD), desktop publishing, image processing, animation, and multimedia presentation systems.
VGA cards are controlled by a register set, referred to herein as the VGA registers. The VGA register set was published early on, and programs were allowed to write to the registers at will. This allows programs to control the VGA card's mode of operation. These programs may change the VGA mode one or more times during operation of the program.
Multi-sync monitors are designed to display images for all VGA modes of operation. Each VGA mode might have a different resolution and timing. Multi-sync monitors have built-in scalars and timing phase-locked-loops (PLLs) that lock to whatever output mode the graphics card is in. The scalar scales the image to fit the screen, and the PLL locks to the VGA timing. These displays therefore are able to adapt whenever a program might change the VGA mode and to display a correctly scaled and aligned image.
Some display devices, however, operate on a fixed timing and resolution and are unable to lock to a different timing or scale the image to fit the resolution of the display. Many flat panel displays and televisions have these fixed requirements. If the VGA controller were allowed to drive these displays without additional processing, then the VGA image would (at best) not be aligned properly when displayed on the display device. For these displays to be compatible with legacy VGA software, the display controller must bridge the gap between the VGA mode and the fixed timing expected by the display.
One approach to handling this problem is for display controllers to determine the VGA mode by counting the pixels and lines output by the VGA timing generator, and then adjusting the output to the display accordingly so that the VGA image is properly aligned. However, it sometimes takes multiple frames before the mode may be determined, and in the interim the image will not be displayed properly. This effect may become particularly bothersome if the VGA software changes modes frequently.
Therefore, a need exists for an improved system and method for aligning a VGA image for display on a fixed-resolution display device.
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Jensen Richard W.
Jolly Paul A.
Meinerth Kim A.
Singla Ashutosh
Intel Corporation
Said Mansour M.
Shalwala Bipin
Wong Sharon
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