System and method for virtual packet reassembly

Details System and method for virtual packet reassembly System and method for virtual packet reassembly

2007-01-30

2007-01-30

Vu, Viet D. (Department: 2154)

Electrical computers and digital processing systems: multicomput

Distributed data processing

C705S055000, C726S025000

Reexamination Certificate

active

10196512

ABSTRACT:
A system and method for receiving data packets at a computer system are presented. The method and system comprise receiving at a buffer, at least two data packets. Once received, an ending portion of the first data packet is stored in a buffer, wherein the ending portion comprises at least the last data bit in the first data packet. Next the method and system concatenates the ending portion of the first data packet with a beginning portion of the second data packet so a string search engine can determine if the concatenated data contains a known string of malicious data bits.

REFERENCES:
patent: 6070154 (2000-05-01), Tavor et al.
patent: 6263444 (2001-07-01), Fujita
patent: 6266771 (2001-07-01), Bellare et al.
patent: 6667978 (2003-12-01), Delp et al.
patent: 2002/0073138 (2002-06-01), Gilbert et al.

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