Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1996-01-23
2001-02-13
Brown, Glenn W. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
Reexamination Certificate
active
06188235
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a test system for verifying proper connection of the pins of an integrated circuit (IC) connected to the circuit paths of a circuit board, and to a method for testing the IC.
BACKGROUND OF THE INVENTION
A test system and corresponding method is described in U.S. Pat. No. 5,280,237.
Parasitic transistors accessed through the pins of the IC under consideration are determined therein, such transistors being formed in the IC by the diodes between the substrate and ground. These diodes are parasitic diodes. The resulting transistors thereby formed are identified therein as parasitic transistors or lateral transistors.
The transistor measurements are carried out in the so-called grounded emitter configuration, in which the emitter of the transistor is connected to the ground terminal of the tester. In this method, the base of the transistor, which is the GND pin (ground pin) of the IC, is not connected to ground, as is usually the case, but instead a base voltage suitable to turn on the transistor is applied to it. Two signal pins of the IC are connected as emitter and collector respectively. The diodes between GND and the signal pins respectively form the emitter and collector diodes of the transistor. The collector current is measured. The transistor under test is hereinafter called the “test transistor”.
The advantage of this method over previous test methods, for example node impedance measurements, is the improved ability to make reliable verification of the proper connection of the pins of IC's on complex boards, particularly those with bus structured circuits, where many IC pins are in parallel.
IC's fabricated in bipolar technology such as TTL contain test transistors which lend themselves well to such test methods. Difficulties are however encountered when testing IC's fabricated in CMOS technology, which is increasingly being used. Presently almost all high density IC's are manufactured using CMOS technology.
It transpires that for CMOS IC's even when measuring isolated IC's with open pins (i.e. when they are not connected into a circuit), problems arise which are due to effects topically known i n the literature as “background currents”. When a test transistor is measured in a CMOS IC, currents are generated which are significantly higher than the current expected from the test transistor itself. The additional current apparently flowing through the test transistor and referred to hereafter as additional current, is referred to in the literature as “background current”. This additional current is highly dependent on IC manufacturing parameters, such as different manufacturers or different batches.
It is difficult or impossible to separate the current due to the test transistor from the additional current. Because the additional current is often significantly higher than the test transistor's current, it is not possible to make reliable deductions about the properties of the test transistor.
If, due to parallel connections between the pins of the IC, several test transistors are in parallel, and the current due to one test transistor is known, it is possible to deduce the number of test transistors from the total current flowing in the parallel circuit, since the test transistors of an IC usually exhibit similar characteristics. If however a very high additional current flows , such deductions about the number of test transistors connected in parallel are impossible.
SUMMARY OF THE INVENTION
The object of the present invention is to provide test systems and methods of the above-mention ed type, which also for CMOS IC's permit the measurement of test transistors with a high degree of accuracy, in particular with a high degree of resolution against the additional current.
The invention is based on the discovery that when turning on a test transistor in a CMOS IC, namely a transistor having one signal pin as emitter, having GND as base, and another signal pin as collector, that an additional transistor (hereinafter described as additional transistor) will always be turned on, and that this occurs without the test system being connected to any other pins of the IC. The additional transistor is a transistor that has its collector on the voltage supply pin V
CC
. This additional transistor is present in all IC's, whether fabricated in CMOS or bipolar technology. It consists of a parasitic diode located between GND and V
CC
, which is present in all IC's, and which operates as collector diode in combination with any diode present between GND and the signal pin connected as emitter to ground, and which acts as emitter diode. When forming a test transistor with collector, base, and emitter connections, the additional transistor therefore has the same emitter and the same base, but has the V
CC
pin as its collector.
If there is no external connection to the supply voltage pin V
CC
of a bipolar IC the additional transistor ha s no collector voltage. This is not the case for CMOS IC's.
In CMOS IC's there is a parasitic diode between each signal pin and the supply voltage pin V
CC
, with forward direction from the signal pin to the supply voltage pin. So if a collector votage is applied to any signal pin of a CMOS IC, current flows to the supply voltage pin V
CC
and causes a voltage, which though somewhat smaller due to the intervening diode, is enough to act as collect or voltage for the additional transistor and is referred to hereafter as additional voltage. The collector current measure d at the signal pin which is connected as collector consists of some of the current flowing through the test transistor and the current flowing through the additional transistor via the diode mentioned.
The diode which is located between GND and V
CC
generally has the unfortunate property of conducting much better than the diodes between GND and the signal pins used as collector diodes. The additional transistor therefore generally has a much higher current amplification than any of the test transistors. If the sum of the currents of the test transistor and the additional transistor are measured when measuring the collector current of a test transistor, then the current of interest, namely that contributed by the test transistor, is very small compared to the overall current, and it is therefore not possible to make any reliable determination of the current and properties of the test transistor. The additional current flowing through the additional transistor is the current referred to in recent literature as “Background Current”.
It is especially unfortunate that boards fitted with IC's normally have the ground pins and supply voltage pins V
CC
connected respectively in parallel. Furthermore, particularly with bus structures, signal pins of several IC's are connected in parallel. If signal pins which are connected in parallel are used as the emitter for the test transistors being measured, then additional transistors in several IC's are in parallel, and will be turned on during the measurement of the test transistor. Large additional currents are thereby generated, so that even with the most accurate test systems it is no longer possible to determine the collector current of the test transistor.
By means of the invention it is possible to distinguish between the collector currents of test transistors and the additional currents, so that test transistors can be measured with greater accuracy.
In accordance with the invention, firstly the collector current of the test transistor is determined in the traditional way, which is made up of the sum of the current through the actual test transistor and the current from the additional transistor. The additional voltage appearing at the supply voltage pin V
CC
due to the diode between the signal pin used as collector and the supply voltage pin is then measured, and in a second step the collector of the test transistor is disconnected and the additional transistor alone is then driven by applying the previously measured additional
Buks Manfred
Hosseini Karim
Brown Glenn W.
Farley Walter C.
Scorpion Technologies AG
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