Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2002-09-24
2010-02-16
Ghayour, Mohammad H (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S316000, C375S354000, C375S360000, C375S363000, C375S364000, C375S365000, C375S366000, C375S371000, C375S376000
Reexamination Certificate
active
07664214
ABSTRACT:
A communication system, clock generation circuit, and method are provided for receiving jitter upon data and to generate a clock reference that does not contain the received jitter. The clock reference can be used either by a digital subsystem of a communication system node, or can be transmitted as substantially jitter-free data from that node to a downstream node of the communication system. Instead of recovering the clock reference from the data having jitter, a pattern is regularly defined within the data stream preferably at periodic, timed intervals. The data pattern may be made up of a series of non-transitions which, regardless of any jitter in the data itself, does not impute any jitter onto a phase-locked loop triggered from an edge of the non-transitioning data pattern. Using the edge as a reference point, a jitter-free clocking signal can be derived at the same frequency as a clocking signal which would normally be produced from the jitter-induced data.
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International Search Report, application No. PCT/US 03/30053, mailed Mar. 2, 2004.
Knapp David J.
Lewis Jason E.
Daffer Kevin L.
Daffer McDaniel LLP
Ghayour Mohammad H
Standard Microsystems Corporation
Vlahos Sophia
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