Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate
2011-02-22
2011-02-22
Dollinger, Tonia L (Department: 2443)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
C709S235000
Reexamination Certificate
active
07895352
ABSTRACT:
A method for throttling host throughput in a computer storage subsystem is provided. The host throughput is compared to a throughput limit for a predetermined time period. If the host throughput exceeds the throughput limit during the predetermined time period, an input/output (I/O) delay is set equal to the remainder of the predetermined time period, and the delay is implemented for an associated storage device of the computer storage subsystem.
REFERENCES:
patent: 7127568 (2006-10-01), Watanabe et al.
patent: 2003/0154272 (2003-08-01), Dillon et al.
patent: 2003/0191856 (2003-10-01), Lewis et al.
patent: 2004/0010585 (2004-01-01), Jones et al.
patent: 2005/0138422 (2005-06-01), Hancock et al.
patent: 2006/0090163 (2006-04-01), Karisson et al.
Ageyev Igor I.
Anna Gary
Bish Thomas W.
Bortz Kimberly A.
Kishi Gregory T.
Cooney Adam
Dollinger Tonia L
Griffiths & Seaton PLLC
International Business Machines - Corporation
LandOfFree
System and method for throttling host throughput does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for throttling host throughput, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for throttling host throughput will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2619030