System and method for testing worst case transients in a...

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C323S282000

Reexamination Certificate

active

07633277

ABSTRACT:
One embodiment of the present invention sets forth a system and a method for testing the worst-case transients in the output voltage produced by a switching-mode power supply (SMPS). The system includes an SMPS and a dynamic load generator (DLG). The SMPS converts the input voltage into the output voltage by using a top field-effect transistor (FET) and a bottom FET. The worst case transients occur when the load being provided to the SMPS is turned on or off at the same time the top FET is turned off. The DLG is configured to monitor the edge of the gate voltage of the top FET and to turn the load provided to the SMPS on or off when the edge of the gate voltage of the top FET is falling. Consequently, the disclosed system is able to test the worst-case transients in the output voltage produced by the SMPS in a manner that is more reliable than prior art approaches.

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patent: 6509712 (2003-01-01), Landis
patent: 6809504 (2004-10-01), Tang et al.
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patent: 2007/0096704 (2007-05-01), Jain et al.
patent: 2009/0195231 (2009-08-01), Noon et al.

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