System and method for synchronizing plural processor clocks in a

Details System and method for synchronizing plural processor clocks in a System and method for synchronizing plural processor clocks in a

1997-03-24

1999-02-23

Heckler, Thomas M.

G06F 112

Patent

active

058753206

ABSTRACT:
The system and method of the present invention allows synchronization of processor clocks in a multiprocessor information handling system. The present invention calculates an average processor clock value for each processor being synchronized. All processors being synchronized read their clocks a predetermined number of times. The clock reading is done simultaneously by all the processors being synchronized. Each processor then calculates an average processor clock value, which is equivalent, for synchronization purposes, to the average processor clock values of the other processors. When more than two processors are being synchronized, a processor may be chosen as the primary processor. The other, secondary processors are synchronized one at a time with the primary processor. An adjustment is then made to the average processor clock values obtained, so that all average processor clock values are based on the same average processor clock value of the primary processor. Processor clocks in multiprocessor information handling systems may be efficiently synchronized within a small number of clock cycles. The synchronization may be accurately performed on any number of processors in a multiprocessor information handling system.

REFERENCES:
patent: 4746920 (1988-05-01), Nellen et al.
patent: 4882739 (1989-11-01), Potash et al.
patent: 5041966 (1991-08-01), Nakai et al.
patent: 5146585 (1992-09-01), Smith, III
patent: 5371896 (1994-12-01), Gove et al.
patent: 5408506 (1995-04-01), Mincher et al.
patent: 5448732 (1995-09-01), Matsumoto
patent: 5450573 (1995-09-01), Gronemeyer
patent: 5495615 (1996-02-01), Nizar et al.
patent: 5504927 (1996-04-01), Okamoto et al.
"Synchronization of Multi-Media Digital Signal Processor with Integrated Services Digital Network Timing," IBM Technical Disclosure Bulletin, vol. 37, No. 9, Sep. 1994, pp. 9-11.

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