System and method for synchronizing multiple processors during p

Details System and method for synchronizing multiple processors during p System and method for synchronizing multiple processors during p

1995-11-21

1998-06-16

Kriess, Kevin A.

G06F 906

Patent

active

057685851

ABSTRACT:
A method for synchronizing testing of shared memory contained in a multi-processor computer system after reset. The method involves the steps of performing a wake-up procedure by a bootstrap processor on the other processors. Thus, the other processors can assist in testing the shared memory. Next, respective portions of the shared memory are allocated to each of the processors. Finally, upon completion of testing of its respective portion of the shared memory, each processor sets its unique storage unit synchronizing the processors at completion.

REFERENCES:
patent: 5379431 (1995-01-01), Lemon et al.
patent: 5450576 (1995-09-01), Kennedy
patent: 5619716 (1997-04-01), Nonaka et al.
patent: 5649100 (1997-07-01), Ertel et al.

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