System and method for synchronizing memory array signals

Details System and method for synchronizing memory array signals System and method for synchronizing memory array signals

2006-04-04

2006-04-04

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S230030, C365S233100, C365S203000

Reexamination Certificate

active

07023759

ABSTRACT:
A method of generating access signals for a memory array. The method includes receiving a synchronization signal and generating a wordline select signal in response to the synchronization signal. A local precharge signal is generated in response to the synchronization signal. A precharge signal is generated in response to the synchronization signal, the precharge signal being a row signal for regulating memory array read operations. A write signal is generated in response to the synchronization signal, the write signal being a row signal for regulating memory array write operations.

REFERENCES:
patent: 5668761 (1997-09-01), Muhich et al.
patent: 6657886 (2003-12-01), Adams et al.
patent: 6901003 (2005-05-01), Adams et al.
patent: 2004/0027885 (2004-02-01), Buettner et al.

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