System and method for structurally testing integrated circuit de

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39518306, G06F 1100

Patent

active

056944020

ABSTRACT:
A system (13) is provided for structurally testing an integrated circuit device, The system includes a signature analyzer (14) operable to compress test results received from the integrated circuit device into a signature. A control device (20) is coupled to the signature analyzer (14), The control device (20) is operable to enable the compression operation of the signature analyzer (14) when the test results contain known states and disable the compression operation when the test results contain unknown states.

REFERENCES:
patent: 5383143 (1995-01-01), Crouch et al.
patent: 5574733 (1996-11-01), Kim
patent: 5617531 (1997-04-01), Grouch et al.

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