Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2007-02-27
2007-02-27
Ho, Hoai V. (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S154000, C365S230050
Reexamination Certificate
active
11003292
ABSTRACT:
A memory device, apparatus and method are provided for accessing memory cells. The device, apparatus, and method allow two or more electronic subsystems with corresponding external ports to access a single array of memory elements via a single internal port. Address, data, and control signals from each of the external ports are multiplexed onto the word line drivers and de-multiplexed from the sense amplifiers. Multiplexing and de-multiplexing operations are sequenced based on a state machine that receives synchronized signals from the external port. The synchronized signal can be clock signals that are synchronized to a high-speed sampling clock. Synchronization and sequencing functions can occur over a relatively few number of cycles of the high-speed sampling clock to minimize the time for resolving access conflicts, thereby maximizing the number of external ports which can access the internal port of the array.
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Bridgewater Walter F.
Nayak Anup
Pantelakis Dimitris C.
Raza S. Babar
Cypress Semiconductor Corp.
Daffer Kevin L.
Daffer McDaniel LLP
Ho Hoai V.
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