System and method for stacked die embedded chip build-up

Details System and method for stacked die embedded chip build-up System and method for stacked die embedded chip build-up

2011-08-30

2011-08-30

Andújar, Leonardo (Department: 2829)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S125000, C257S686000

Reexamination Certificate

active

08008125

ABSTRACT:
An embedded chip package (ECP) includes a plurality of re-distribution layers joined together in a vertical direction to form a lamination stack, each re-distribution layer having vias formed therein. The embedded chip package also includes a first chip embedded in the lamination stack and a second chip attached to the lamination stack and stacked in the vertical direction with respect to the first chip, each of the chips having a plurality of chip pads. The embedded chip package further includes an input/output (I/O) system positioned on an outer-most re-distribution layer of the lamination stack and a plurality of metal interconnects electrically coupled to the I/O system to electrically connect the first and second chips to the I/O system. Each of the plurality of metal interconnects extends through a respective via to form a direct metallic connection with a metal interconnect on a neighboring re-distribution layer or a chip pad on the first or second chip.

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