System and method for solving general global data flow predicate

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395707, 39518313, 39518314, G06F 1200, G06F 1300

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059434996

ABSTRACT:
The relationships among predicates can be analyzed over the scope of an entire procedure. The system scans a block of predicated code and collects a set of predicates used in the code to form a basis set. The system then allocates a bit-vector for each predicate in the basis set to form a live set. Each bit-vector represent a liveness of each predicate. The system then builds an interference graph that symbolizes interferences between registers during allocation of registers.

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Alexandre E. Eichenberger and Edward S. Davidson, "Register Allocation for Predicated Code," In Proc. of the 28th Annual International Symposium on Microarchitecture, Nov. 1995.
Alfred B. Aho, Ravi Sethi, Jeffery D. Ullman, Compilers--Principals, Techniques and Tools, 2nd Edition, pp. 624-633, Addison Wesley, 1988.

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