Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-04-23
2004-09-21
Duong, Frank (Department: 2666)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S420000, C370S463000
Reexamination Certificate
active
06795442
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to the field of digital communications systems and more particularly to digital networks for facilitating communication of digital data in, for example, digital image, audio and video distribution systems and among digital computer systems. The invention is more particularly directed to flow control and scheduling arrangements for regulating the flow of information through the network to avoid congestion, prevent loss of data and preserve fairness among a plurality of devices that are transferring information over the network.
BACKGROUND OF THE INVENTION
Digital networks have been developed to facilitate the transfer of information, including data and programs, among digital computer systems and other digital devices. A variety of types of networks have been developed and implemented using diverse information transfer methodologies. In some networks, such as the well-known Ethernet, a single wire is used to interconnect all of the devices connected to the network. While this simplifies wiring of the network in a facility and connection of the devices to the network, it results in generally slow information transfer, since the wire can only carry information, in the form of messages, from a single device at a time. To alleviate this to some extent, in some Ethernet installations, the network is divided into a number of sub-networks, each having a separate wire, with interfaces interconnecting the wires. In such installations, wires can carry messages for devices connected thereto simultaneously, which increases the number of messages that can be transferred simultaneously. It is only when a device connected to one wire needs to send a message to a device connected to another wire that wires in two or more sub-networks will be used, making them unavailable for use by other devices connected thereto.
To further alleviate this, networks have been developed in which communications are handled through a mesh of switching nodes. The computer systems and other devices are connected to various switching nodes. Since the switching nodes themselves are interconnected in a variety of patterns, a number of paths may be available between pairs of the devices, so that if one path is congested, another may be used. Such an arrangement may result in a network which is more complicated than an Ethernet network, but it can provide substantially higher information transfer rates, particularly if optical fiber is used as the media interconnecting the switching nodes and devices. A problem which may arise with such networks is that, in such networks, a switching node or a device, when it is receiving information from another switching node or device in the network, does not have a mechanism to provide “flow-control” information to the transmitting switching node or device. While this does reduce the cost of a network, it may result in congestion, in which either a switching node may receive information at a rate faster than it can transmit it, or a destination device may receive information at a rate faster than it can buffer and process it.
SUMMARY OF THE INVENTION
The invention provides a new and improved system and method for scheduling the transfer of messages in a communications network.
In brief summary, the invention in one embodiment provides a system comprising at least two devices interconnected by a network including at least one communication link. Each device includes a network interface for transferring messages over the network. At least one of the devices as a source device, transmits messages over one or more virtual circuits established over the network, and at least one other of said devices, as a destination device for the respective virtual circuits, receives the messages thereover. The network interface of the source device includes a transmit section that includes a transmitter and a transmit scheduler. The transmitter generally transmits messages for the respective virtual circuits for which the device is the source device. The transmit scheduler schedules transmission of messages by the transmitter so that messages are transmitted in a round-robin manner as among the virtual circuits for which the device is the source device, thereby providing fairness in message transmission as among the virtual circuits. In one embodiment, the transmitter transmits messages in a series of fixed-length cells, each of which can contain a portion of a message, and the transmit scheduler schedules transmission of messages by the transmitter so that messages are transmitted in a round-robin manner as among the virtual circuits for which the device is the source device, so that short messages for ones of the virtual circuits are not unduly delayed by relatively long messages for others of the virtual circuits. The network interface of the destination device includes a receive host for performing predetermined operations in connection with receive messages, and a receive scheduler. The receive scheduler schedules the virtual circuits for which the device is the destination device and enables the receive host to perform the predetermined operations in connection with the virtual circuits for which the device is the destination device in a round robin manner, thereby providing fairness in message processing as among the virtual circuits.
In another embodiment, the network includes a switching node which forms part of the path for one or more virtual circuits between the source device and the destination device. The switching node is connected to receive messages transmitted by the source device over the virtual circuit(s) for which it forms part of the path over one communication link connected thereto, buffer the received messages in an internal buffer, and transmit the buffered messages over the virtual circuit(s) over another communication link connected thereto, thereby to forward messages for the virtual circuit(s) downstream over the respective virtual circuit(s). The switching node transmits the buffered messages over the virtual circuits generally in a round-robin manner for virtual circuits for which the respective communication link forms part of the path, thereby providing fairness in message transmission as among the virtual circuits.
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Clayton Shawn A.
Follett David R.
Godiwala Nitin D.
Gutierrez Maria C.
Wells David S.
Duong Frank
Emulex Design & Manufacturing Corporation
Morrison & Foerster / LLP
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