System and method for routing supply voltages or other...

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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C257S723000

Reexamination Certificate

active

07443011

ABSTRACT:
An integrated circuit or chip includes a first die and a second die positioned on a lead frame of a package including a lead frame, such as a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame. The integrated circuit further includes a redistribution layer formed on the first die to couple selected bond fingers of the lead frame to selected bonding pads of the first and second die. The selected bond fingers may correspond to bond fingers that receive a first supply voltage or the first supply voltage and a second supply voltage.

REFERENCES:
patent: 5325268 (1994-06-01), Nachnani et al.
patent: 5552966 (1996-09-01), Nagano
patent: 5625235 (1997-04-01), Takiar
patent: 7148567 (2006-12-01), Moriguchi et al.

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