System and method for routing signals between side-by-side...

Details System and method for routing signals between side-by-side... System and method for routing signals between side-by-side...

2009-11-18

2011-10-18

Nguyen, Thinh T (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S124000, C438S107000, C257S666000, C257S698000, C257S723000

Reexamination Certificate

active

08039318

ABSTRACT:
An integrated circuit includes a first and a second die positioned on a lead frame of a package. The lead frame includes a plurality of bond fingers. The integrated circuit includes a first bond pad on the first die that is electrically interconnected to a corresponding second bond pad on the second die through first and second bond fingers of the lead frame. The package may be a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame.

REFERENCES:
patent: 4916519 (1990-04-01), Ward
patent: 5198965 (1993-03-01), Curtis et al.
patent: 5838603 (1998-11-01), Mori et al.
patent: 6602735 (2003-08-01), Shyu
patent: 7157790 (2007-01-01), Beauchamp et al.
patent: 2003/0201529 (2003-10-01), Jeong et al.

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