Semiconductor device manufacturing: process – Including control responsive to sensed condition – Electrical characteristic sensed
Reexamination Certificate
2003-02-21
2004-07-20
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
Electrical characteristic sensed
C438S018000
Reexamination Certificate
active
06764866
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to calibration and quality assurance of test apparatus employed for testing microelectronic substrates. More particularly, the present invention relates to efficient and accurate calibration and quality assurance of test apparatus employed for fabricating microelectronic substrates.
2. Description of the Related Art
Common in the microelectronic product fabrication art is the use of test apparatus for electrically testing microelectronic substrates. Microelectronic substrates may be electrically tested in-line prior to their complete fabrication into microelectronic products. Alternatively, microelectronic substrates may be electrically tested subsequent to their complete fabrication into microelectronic products.
While electrical testing of microelectronic substrates is clearly desirable and often essential in the microelectronic product fabrication art, it is nonetheless not entirely without problems. In that regard, it is often difficult to accurately and efficiently electrically test microelectronic substrates.
It is towards the foregoing object that the present invention is directed.
Various apparatus, systems and methods have been disclosed in the microelectronic product fabrication art for electrically testing microelectronic substrates. Included but not limited among the apparatus, systems and methods are those disclosed within: (1) Higgins et al., in U.S. Pat. No. 6,923,178 (an electrical probe apparatus and electrical test method which provide enhanced probe needle to microelectronic substrate contact, absent scrubbing, when electrically testing a microelectronic substrate); (2) Akram et al., in U.S. Pat. No. 6,356,098 (an electrical probe card apparatus, system and method which employ a physical biasing when testing a microelectronic substrate); and (3) Roy et al., in U.S. Pat. No. 6,480,978 (an electrical test method which employs inter-device under test and intra-device under test comparisons).
Desirable are apparatus, systems and methods for accurately and efficiently electrically testing microelectronic substrates.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the invention is to provide a system for testing a microelectronic substrate and a method for testing the microelectronic substrate.
A second object of the invention is to provide a system and a method in accord with the first object of the invention, wherein the microelectronic substrate is accurately and efficiently tested.
In accord with the objects of the invention, the invention provides a method for calibrating a multiple die under test head for use when electrically testing a microelectronic substrate and a system for calibrating the multiple die under test head for use when electrically testing the microelectronic substrate.
The method first provides a microelectronic test apparatus comprising a multiple die under test head. The method also provides a calibration standard substrate having a plurality of die arrays which may be tested while employing the multiple die under test head. The method further provides for classifying the plurality of die arrays with respect to: (1) position within the calibration standard substrate; and (2) defective die and non-defective die within a series of die locations within each of the plurality of die arrays. The method then provides for selecting from the plurality of die arrays a sub-set of die arrays which: (1) do not overlap in position within the calibration standard substrate; and (2) have in an aggregate no greater than one defective die within each of the series of die locations. Finally, the method provides for qualifying the multiple die under test head through measurement of the sub-set of die arrays.
The method in accord with the invention contemplates a system in accord with the invention.
The invention provides a system for testing a microelectronic substrate and a method for testing the microelectronic substrate, wherein the microelectronic substrate is accurately and efficiently tested.
The invention generally realizes the foregoing object within the context of a method for qualifying a multiple die under test head employed within an electrical test apparatus employed for testing a microelectronic substrate and a system for qualifying the multiple die under test head employed within the electrical test apparatus employed for testing the microelectronic substrate. The invention more specifically realizes the foregoing object by: (1) classifying a plurality of die arrays within a calibration standard substrate with respect to: (a) position within the calibration standard substrate; and (b) defective die and non-defective die within a series of die locations within each of the plurality of die arrays, such that there may be: (2) selected from the plurality of die arrays a sub-set of arrays which: (a) do not overlap within the calibration standard substrate; and (b) have in an aggregate no greater than one defective die-within each of the series of die locations. The sub-set of die arrays may then be employed for qualifying the multiple die under test head with enhanced accuracy and efficiency since the sub-set of die arrays comprises an increased number of non-defective dies.
REFERENCES:
patent: 5103557 (1992-04-01), Leedy
patent: 5923178 (1999-07-01), Higgins et al.
patent: 6210984 (2001-04-01), Farnworth et al.
patent: 6356098 (2002-03-01), Akram et al.
patent: 6396712 (2002-05-01), Kuijk
patent: 6480978 (2002-11-01), Roy et al.
patent: 6605479 (2003-08-01), Pasadyn et al.
Hsiao Chun-Chieh
Huang Jun-Hao
Lin Lee-Chung
Chaudhari Chandra
Taiwan SEmiconductor Manufacturing Co., Ltd.
Tung & Associates
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