System and method for pulling electrically isolated memory...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S230030, C365S230080, C365S189090, C365S206000, C365S214000

Reexamination Certificate

active

06735146

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates generally to the field of integrated circuits, and more particularly to a system and method for pulling electrically isolated memory cells in a memory array to a non-floating state.
BACKGROUND OF THE INVENTION
Modern electronic equipment such as televisions, telephones, radios and computers are generally constructed of solid state devices. Solid state devices are preferred in electronic equipment because they are extremely small and relatively inexpensive. Additionally, solid state devices are very reliable because they have no moving parts, but are based on the movement of charge carriers.
Solid state devices may be transistors, capacitors, resistors, and other semiconductor devices. Typically, such devices are formed in and on a substrate and are interconnected to form an integrated circuit. Presently, there is a great demand for shrinking semiconductor devices to provide an increased density of devices on the semiconductor chip that are faster and consume less power. For memory devices, this has included using a low-resistance metal wordline in place of a higher resisting polysilicon wordline with metal strapping. Small defects or breaks in the connections can cause electrical leakage and other problems.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention, a memory array includes a plurality of memory cells, the memory cells each comprising one or more gates, and a word line for controlling the gates of the plurality of memory cells. A driver is coupled to the word line at a first location. The driver is operable to drive the gates of the memory cells. A load device is coupled to the word line at a second location remote from the first location. The load device is operable to pull a set of gates electrically isolated from the driver to a non-floating state.
Technical advantages of the present invention include providing an improved memory array. In particular, the reliability of the memory arrays using memory cells may be increased by reducing or eliminating the problems caused by floating memory cells. Electrically isolated memory cells are pulled to a non-floating state by a load device. The load device may be of relatively low cost and small size. The small size of the load device allows incorporation into existing technology with only minimal rework. In a particular embodiment, the load device may be incorporated into unused columns of memory cells at the periphery of each memory array.
Certain embodiments may possess none, one, some, or all of these technical features and advantages and/or additional technical features and advantages. Other technical advantages will be readily apparent to one skilled in the art from the following figures, description, and claims.


REFERENCES:
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patent: 5428577 (1995-06-01), Yumitori et al.
patent: 6028793 (2000-02-01), Manstretta et al.
patent: 6385091 (2002-05-01), Pekny
patent: 6603683 (2003-08-01), Hsu et al.
patent: 2003/0043677 (2003-03-01), Marr
patent: 2003/0210566 (2003-11-01), Yamagami
patent: 402079469 (1990-03-01), None

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