System and method for providing scalability in an integrated...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S202000, C257S678000, C257S737000

Reexamination Certificate

active

07038257

ABSTRACT:
The invention provides a system and method for providing scalability in an integrated circuit (IC) having a package coupled to a die through package balls. The die includes a plurality of input/output (I/O) slots and a hardmac configured to implement a logic function. A patch board is included between the hardmac and the I/O slots, wherein the hardmac includes a plurality of attachment points. The hardmac is attached to the plurality of I/O slots through the patch board, wherein adjacent attachment points join to non-adjacent I/O slots through the patch board.

REFERENCES:
patent: 5543640 (1996-08-01), Sutherland et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System and method for providing scalability in an integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for providing scalability in an integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for providing scalability in an integrated... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3537464

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.