Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Reexamination Certificate
2007-09-21
2010-06-29
Pham, Thanh V (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
C438S296000, C438S404000, C257SE21545, C257SE21551
Reexamination Certificate
active
07745902
ABSTRACT:
A system and method is disclosed for providing improved trench isolation of semiconductor devices. An isolation trench of the present invention is manufactured as follows. A substrate of a semiconductor device is provided and a trench is etched in the substrate. Then a silicon liner is grown in the trench. The trench is then filled with polysilicon material. Polysilicon material is also deposited on top of the filled trench to protect the silicon dioxide liner from the effects of subsequent etch procedures and oxidation procedures. The initial height of the polysilicon material is selected to be large enough to allow the polysilicon material to survive the subsequent etch procedures and oxidation procedures.
REFERENCES:
patent: 4369565 (1983-01-01), Muramatsu
patent: 4577395 (1986-03-01), Shibata
patent: 4631803 (1986-12-01), Hunter et al.
patent: 4835115 (1989-05-01), Eklund
patent: 4876214 (1989-10-01), Yamaguchi et al.
patent: 4983226 (1991-01-01), Hunter et al.
patent: 5106777 (1992-04-01), Rodder
patent: 5358891 (1994-10-01), Tsang et al.
patent: 5448102 (1995-09-01), Gaul et al.
patent: 5468676 (1995-11-01), Madan
patent: 5474953 (1995-12-01), Shimizu et al.
patent: 5486714 (1996-01-01), Hong
patent: 5581110 (1996-12-01), Razouk et al.
patent: 5607875 (1997-03-01), Nishizawa et al.
patent: 5683908 (1997-11-01), Miyashita et al.
patent: 5753554 (1998-05-01), Park
patent: 5776808 (1998-07-01), Muller et al.
patent: 5801083 (1998-09-01), Yu et al.
patent: 5872044 (1999-02-01), Hemmenway et al.
patent: 5874317 (1999-02-01), Stolmeijer
patent: 5920108 (1999-07-01), Hemmenway et al.
patent: 5945704 (1999-08-01), Schrems et al.
patent: 6069057 (2000-05-01), Wu
patent: 6153478 (2000-11-01), Lin et al.
patent: 6323106 (2001-11-01), Huang et al.
patent: 6613690 (2003-09-01), Chang et al.
patent: 6624044 (2003-09-01), Ito et al.
patent: 6780695 (2004-08-01), Chen et al.
patent: 6825078 (2004-11-01), Huang
patent: 2001/0039088 (2001-11-01), Aoki et al.
patent: 2002/0076880 (2002-06-01), Yamada et al.
patent: 2004/0018676 (2004-01-01), Park
patent: 2005/0170661 (2005-08-01), Economikos et al.
Naresh Thapar et al., “Elimination of the “Birds Beak” in Trench MOS-Gate Power Semiconductor Devices”, Power Semiconductor Research Center, 1996 IEEE, pp. 83-86.
G. Fallico et al., “A New Process for Defect-Free Definition of Active Areas in Deep Trench Isolated Bipolar Devices”, Microelectronic Engineering 15 (1991) pp. 655-658.
R. Bashir et al., “PLATOP: A Novel Planarized Trench Isolation and Field Oxide Formation Using Poly-Silicon”, IEEE Electron Device Letters, vol. 17, No. 7, Jul. 1996, pp. 352-354.
H. Bernhard Pogge, “The Spaces Between the Functions On a Chip”, Chemtech, Mar. 1986, pp. 168-173.
R. Jerome et al., “The Effect of Trench Processing Conditions on Complementary Bipolar Analog Devices with SOI/Trench Isolation”, IEEE 1993 Bipolar Circuits and Technology Meeting 3.2, pp. 41-44.
Henry Caleb
National Semiconductor Corporation
Pham Thanh V
LandOfFree
System and method for providing improved trench isolation of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for providing improved trench isolation of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for providing improved trench isolation of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4205638