System and method for providing equalization in a multiphase...

Pulse or digital communications – Equalizers

Reexamination Certificate

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C333S018000, C333S02800T, C708S300000, C708S819000

Reexamination Certificate

active

10021784

ABSTRACT:
A circuit and method for receiving digital signals are disclosed. The circuit includes an input connected to a communications channel over which a digital signal is communicated and operates a plurality of multiple decision circuits at a frequency that is a fraction of the bit rate of the digital signal. A feedback and/or equalizer circuit receives the output of the decision circuits and applies a feedback signal to the input of the decision circuits that is representative of a combination of output signals of the decision circuits. The result is seen to improve the noise margin for correctly interpreting signals communicated over a communications channel having a low-pass characteristic.

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Farjad-Rad, Ramin, A 0.3-um CMOS 8-Gb/s 4-PAM Serial Link Transceiver, IEEE Journal of solid-State Circuits, vol. 35, No. 5, May, 2000, pp. 757-764.

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