System and method for providing efficient access to a memory ban

Details System and method for providing efficient access to a memory ban System and method for providing efficient access to a memory ban

1996-10-31

1997-11-18

Nelms, David C.

Static information storage and retrieval

Addressing

Multiplexing

36523004, 36523006, G11C 700

Patent

active

056894724

ABSTRACT:
Apparatus, method, and system aspects for providing efficient accesses to memory in a computer system, the computer system including a controller, are described. Included in the aspects are a random access memory array having a plurality of rows and columns and coupled to the controller, and a column selection mechanism coupled to the memory array and the controller with the column selection mechanism being divided into predetermined portions for providing column selection signals to access chosen portions of a row in the memory array. Further included as the column selection mechanism is a multiplexer. In one embodiment, the multiplexer is divided into halves and provides separate selection signals for accessing upper word halves and lower word halves of the random access memory.

REFERENCES:
patent: 5361339 (1994-11-01), Nadakia et al.
patent: 5479393 (1995-12-01), Yun et al.

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