Data processing: structural design – modeling – simulation – and em – Emulation
Reexamination Certificate
2006-04-05
2009-08-18
Shah, Kamini S (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Emulation
C703S013000, C703S024000, C703S027000, C703S028000, C716S030000
Reexamination Certificate
active
07577558
ABSTRACT:
A memory mapping system for providing compact mapping between dissimilar memory systems and methods for manufacturing and using same. The memory mapping system can compactly map contents from one or more first memory systems into a second memory system without a loss of memory space in the second memory system. Advantageously, the memory mapping system can be applied to hardware emulator memory systems to more efficiently map design memory systems into an emulation memory system during compilation.
REFERENCES:
patent: 5036473 (1991-07-01), Butts et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5475830 (1995-12-01), Chen et al.
patent: 5551013 (1996-08-01), Beausoleil et al.
patent: 5819065 (1998-10-01), Chilton et al.
patent: 5960191 (1999-09-01), Sample et al.
patent: 6035117 (2000-03-01), Beausoleil et al.
patent: 6051030 (2000-04-01), Beausoleil et al.
patent: 7370291 (2008-05-01), Fung et al.
Zhou et al., “ILP Method for Memory Mapping in High-Level Synthesis”, Microelectronics Reliability, vol. 43, Issue 7, Jul. 2003, pp. 1163-1167.
Ouaiss et al., “Hierarchical Memory Mapping During Synthesis in FPGA—Based Reconfigurable Computers”, Proceedings of the Conference on Design, Automation, and Test in Europe, 2001, pp. 650-657.
W. C Ho, et al; Logical-to-Physical Memory Mapping for FPGAs with Dual-Port Embedded Arrays FPL 99 LNCS 1673, 1999, pp. 111-123.
Silberschatz, et al; Operating System Concepts, Feb. 1994, Addison-Wesley p. 268-p. 271.
Krachmer, et al Definition and Solution of the Memory Packing Problem for Field-Programmable System IEEE/ACM International Conference on Computer-Aided Design Digest of Technical Papers (ICCAD) San Jose Nov. 6-10, 1994, Los Alamitos, IEEE Comp. Soc. Press US Nov. 6, 1994, pp. 20-26; ISBN 0-8186-6417-7; pp. 20-23.
EP Search Report and Office Action, Aug. 22, 2006.
Day Herng-Der
Orrick Herrington & Sutcliffe LLP
Quickturn Design Systems Inc.
Shah Kamini S
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