Multiplex communications – Channel assignment techniques – Carrier sense multiple access
Reexamination Certificate
1997-12-18
2001-05-08
Chin, Wellington (Department: 2664)
Multiplex communications
Channel assignment techniques
Carrier sense multiple access
C370S447000, C370S461000, C370S468000
Reexamination Certificate
active
06229817
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to data networks,;and more particularly, to a system for adjusting slot time for late collision.
BACKGROUND ART
When two packets collide, the medium in a data network may remain unusable for the duration of transmission of both damaged packets. For packets that are long compared to propagation time, the amount of wasted capacity can be considerable. This waste can be reduced if a station continues to listen to the medium while it is transmitting.
The most commonly used medium access control technique for bus/tree topologies is carrier sense multiple access with collision detection (CSMA/CD). For the Ethernet network, the ANSI/IEEE Standard 802.3 (ISO/IEC 8802-03, 1996) requires a media access control (MAC) engine in a CSMA/CD communication station to monitor the medium for traffic. If a collision is detected during transmission, the transmitted frame is aborted, and a brief jamming sequence is produced to assure that all stations in the network know that there has been a collision. After the jamming sequence is transmitted, the communication station attempts to transmit the aborted frame again.
In accordance with the ANSI/IEEE Standard 802.3, if a collision is detected after the preamble of a frame is completed, but prior to 512 bits being transmitted, the MAC engine will abort the transmission and append the jam sequence immediately. The jamming sequence is a 32-bit all zeros pattern. The MAC engine will attempt to transmit a frame a total of 16 times.
If a collision is detected after 512 bits have been transmitted, the collision is termed a late collision. In this case, the MAC engine will abort the transmission, and append the jam sequence. No retry attempt will be scheduled on detection of the late collision, and the transmitted message will be discarded.
Thus. the ANSI/IEEE Standard 802.3 establishes a late collision slot time for a collision detection procedure to retry the transmission of a frame if a collision is detected within the late collision slot time, and to discard the frame if a collision is detected outside the late collision slot. However, different physical layer devices (PHY) can have different internal delays for collision detection. As a result, false detection of the late collision can occur, when the collision actually occurs within the late collision slot time.
Thus, it would be desirable to provide a system for adjusting the late collision slot time to prevent the false late collision detection.
DISCLOSURE OF THE INVENTION
Accordingly, a primary object of the present invention is to provide a system for adjusting a late collision slot time to prevent false late collision detection.
The above and other advantages of the invention are achieved, at least in part, by providing a data communications network for supporting data exchange between a plurality of communication stations. The network comprises a collision detection circuit for detecting a collision during transmission of a frame. The collision detection circuit is configured to detect a late collision condition if the collision occurs after a preset number of bits of the frame have been transmitted. The frame is being retransmitted if the collision occurs prior to the transmission of the preset number of bits. However, the frame is discarded without retransmission if the collision occurs after the preset number of bits have been transmitted.
A late collision adjustment circuit is provided to control the collision detection circuit so as to adjust the preset number of bits in accordance with network conditions. The late collision adjustment circuit may comprise a register that stores a late collision adjustment value programmed in accordance with the network conditions.
For example, the late collision adjustment circuit may control the collision detection circuit to compensate for internal delays of a device configured to receive the frame.
In accordance with another aspect of the invention, network interface is provided to support data exchange between a host computer and a network. A media access controller provides an interface to a physical layer device arranged in the network. The media access controller is configured to detect a collision during transmission a frame to the physical layer device. A late collision slot time programming circuit is coupled to the media access controller for programming a value of late collision slot time, within which the collision is identified as being legal.
For example, the late collision slot time programming circuit may increase a late collision slot time defined by the ANSI/IEEE Standard 802.3 to compensate for internal delays in the physical layer device.
In accordance with the method of the present invention the following steps are carried out for providing data transmission:
detecting a collision during transmission of a frame,
retransmitting the frame if the collision occurs within late collision slot time,
discarding the frame if the collision occurs after the late collision slot time, and
adjusting the late collision slot time in accordance with transmission conditions.
Still other objects and advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be rewarded as illustrative in nature, and not as restrictive.
REFERENCES:
patent: 5321819 (1994-06-01), Szczepanek
patent: 5329519 (1994-07-01), L'Anson
patent: 5572511 (1996-11-01), Ouyang et al.
patent: 5664105 (1997-09-01), Keisling et al.
Dwork Jeffrey
Fischer Jenny Liu
Yu Ching
Advanced Micro Devices , Inc.
Chin Wellington
Duong Frank
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