System and method for programming a memory cell

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

Reexamination Certificate

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Details

C257S173000, C257S529000, C257S530000, C257S665000, C327S525000, C365S225700, C365S177000

Reexamination Certificate

active

10355260

ABSTRACT:
The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application of current to a memory cell over a controlled time period. The invention utilizes a current mirror configuration having a first transistor and a second transistor, wherein the second transistor is coupled to the memory cell. Programming of the memory cell includes applying a voltage to the first transistor, whereby a first current is generated in the first transistor. A gate of the second transistor is coupled to the first transistor, whereby a second current is generated in the second transistor. The second current is proportional to the first current. The second current is provided to the memory cell, whereby the second current programs the memory cell.

REFERENCES:
patent: 5130777 (1992-07-01), Galbraith et al.
patent: 5644216 (1997-07-01), Lopez et al.
patent: 5828607 (1998-10-01), Bushey et al.
patent: 6258700 (2001-07-01), Bohr et al.
patent: 6392931 (2002-05-01), Pasotti et al.
ARM Technical Support Info, www.arm.com/support/faqdev/1277.html.

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