Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...
Reexamination Certificate
2000-10-10
2004-04-27
Treat, William M. (Department: 2183)
Electrical computers and digital processing systems: processing
Byte-word rearranging, bit-field insertion or extraction,...
C712S222000, C712S004000
Reexamination Certificate
active
06728874
ABSTRACT:
BACKGROUND
A. Technical Field
The present invention relates generally to computer data processing, and more particularly, to a system and method for processing both big endian and little endian vector data.
B. Background of the Invention
Computer data typically comes in two modes: “big endian” and “little endian.” The terms “big endian” and “little endian” refer to which addresses of pieces of information are most significant. In big endian computer architectures, the pieces of information with the lowest addresses are the most significant. In little endian architectures, the pieces of information with the highest addresses are the most significant.
For example, consider data that consists of four bytes. In a big endian scheme, the most significant byte is at address “a.” Address “a+1” has the second most significant byte, address “a+2” has the third most significant byte, and address “a+3” has the least significant byte. In contrast, in a little endian scheme, the least significant byte is at address “a.” Address “a+1” has the second least significant byte, address “a+2” has the third least significant byte, and address “a+3” has the most significant byte.
FIG. 1
is a table that shows an example of big endian and little endian orders, depicting the number
1025
(2 to the tenth power plus one) stored in a 4-byte integer: 00000000 0000000 00000100 00000001.
Since big endian and little endian data have different orders, a system cannot treat big endian and little endian data in the same manner. For example, if a system treated big endian data as little endian data, the system would end up treating the information at address “a” as the least significant data, when it should be treating that data as the most significant. This treatment would result in errors. Therefore, systems must use only one sort of data, big endian or little endian, or have different provisions to deal with both big endian and little endian data.
When the data is scalar, it is fairly simple to deal with both big endian and little endian data. FIGS.
2
(
a
) through
2
(
c
) show an example of scalar data. As seen in FIG.
2
(
a
), “scalar” data means that the data piece
10
only contains one data item
12
. The entire data piece
10
is taken up by the data item
12
. That data item
12
could be the number
1025
, as in the example above. As shown in FIG.
2
(
b
), the data piece could be a 32-bit data piece
14
with four bytes
18
. As shown in FIG.
2
(
c
), the data piece could be a 64-bit piece
16
, with eight bytes
18
, or any other size piece, depending upon the architecture of the system.
Big endian scalar data can easily be converted into little endian scalar data, and little endian scalar data can easily be converted into big endian scalar data. Reversing the order of the data accomplishes this. That is, swapping the information at the first address with the information at the last address, swapping the information at the second address with the information at the second to last address, and continuing in such a manner until all the data has swapped addresses.
This can be seen with the above example, shown in
FIG. 1
, of the number
1025
stored in a 4-byte integer. To convert the big endian representation to the little endian representation, the information in the first and last addresses (addresses
00
and
03
) are swapped, and the information in the second and second-to-last addresses (addresses
01
and
02
) are swapped.
However, such a simple technique does not work with vector data. Fairly recently, computer systems, processors, and other systems have been designed with larger instruction sets that allow vector data. FIGS.
3
(
a
) and
3
(
b
) show examples of vector data. With vector data, the data piece
10
is a vector
102
. The vector
102
can be any size, determined by the architecture of the system: in a 32-bit architecture, the vector
102
would be 32-bits, in 64-bit architecture, the vector
102
would be 64-bits, and so forth. While scalar data only has one data item
12
within the data piece
10
, in vector data, the vector
102
can be divided into a number of separate data items, or “vector elements”
104
. Each of these vector elements
104
can represent a separate piece of data. For example, a first vector element
104
within a vector
102
could represent the number
1025
, while a second vector element
104
within the same vector
102
could represent the number
1024
.
The vector elements
104
are in turn made up of one or more smaller data items. These smaller data items are typically bytes
18
, as depicted in FIGS.
3
(
a
) and
3
(
b
). However, other data units, such as bits, could be used as well. While the term “bytes” is used for the smaller data items, the term “bytes” includes any smaller data units that could be used to make up the vector elements, and the smaller data units are not limited to bytes.
FIG.
3
(
a
) shows an example of a 64-bit vector
102
with four vector elements
104
of two bytes
18
each. FIG.
3
(
b
) shows an example of a 64-bit vector
102
with two vector elements
104
of four bytes
18
each.
Vector data can be of any size. For example, with 64-bit architecture, there could be eight vector elements
104
of one byte each, four vector elements of two bytes each, two vector elements of four bytes each, or one vector element of eight bytes. The vector data could be 32-bit, 128-bit, or any other size as well. Additionally, each vector element could be made of numbers of bits or any other units instead of bytes. Depending on the size of the smaller units, there could be different numbers and sizes of vector elements within each vector.
The simple swapping method that works to convert big endian scalar data to little endian scalar data does not work with vector data. With vector data, the vector elements are located in the same place for both big endian and little endian data modes. Only the data within each vector element is located at different addresses, depending on whether the data is big endian or little endian. If the conversion method for scalar data were used on vector data, the vector elements' positions would be swapped, when all that is desired is for the data within each vector to be swapped.
FIG. 4
is a table showing the incorrect results from simply swapping the byte order. The table depicts a vector
102
of two vector elements
104
, each vector element
104
consisting of two bytes. The number
1025
is stored in the first vector element
104
. The number
1024
is stored in the second vector element
104
. The first column
150
shows the address of each byte. The second column
152
shows the big endian representation of numbers
1025
and
1024
. As seen in the third column
154
, if the last byte (byte
03
) were swapped with the first byte (byte
00
) to convert between big endian and little endian vector data, the result would be an incorrect little endian representation. The fourth column
156
shows the correct little endian representation.
Previously, to enable the use of both big endian and little endian vector data in systems, two versions of the software used on the systems were written, one version for big endian vector data, and one version for little endian vector data. Producing and using two versions of each piece of software is wasteful and expensive.
Accordingly it is desirable to provide a method and system that treats both big endian vector data and little endian vector data correctly.
SUMMARY OF THE INVENTION
The present invention offers a method and system that treats both big endian vector data and little endian vector data correctly. The present invention would typically be implemented in a computer processor. By processing both big endian and little endian vector data correctly, such a processor has the flexibility to deal with both types of data, without the necessity of creating software programs to separately deal with each data order.
To process the vector data, one embodiment of the method involves determining whether the vector data has a b
Pol Evert-Jan D.
Sijstermans Frans W.
Fenwick & West LLP
Koninklijke Philips Electronics , N.V.
Treat William M.
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