System and method for phase lock loop gain stabilization

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

331 17, 331 25, 331177V, 331179, H03L 7093, H03L 7099

Patent

active

056253257

ABSTRACT:
The system and method for phase lock loop (PLL) gain stabilization uses a digital compensation technique to correct for the large amount of gain variation present in a voltage controlled oscillator (VCO) utilizing a varactor diode. AVCO is arranged with additional capacitance in parallel with the vatactor diode of the VCO. By using multiple capacitors, more or less capacitance can be switched into parallel with the vatactor diode. Gain variation is accomplished by switching capacitors into the circuit, and for each combination of capacitors used in the resonant inductance-capacitance (LC) circuit of the VCO, the gain of the phase detector in the PLL is adjusted simultaneously. The phase detector has a charge pump that drives a current into a loop filter having a capacitor with a fixed value. The gain adjustment is accomplished by varying the amount of current available from the charge pump to this filter capacitor. The gain compensation circuit that generates this charge pump current takes the same digital code used to control the capacitors in the VCO as an input and performs a digital-to-analog conversion in current mode. The analog current is then transformed into a second-order polynomial via a current squarer and programmable current scalers to provide a gain compensation signal for the phase detector. The programmable current scalers determine the coefficients of the second order polynomial. Therefore, for any given VCO characteristic with regard to the additional capacitors and the varactor diode, the coefficients of the current scalers can be adjusted to accommodate a more precise PLL gain control.

REFERENCES:
patent: 3631364 (1971-12-01), Schilb et al.
patent: 4442415 (1984-04-01), Ashida
patent: 4482871 (1984-11-01), Stingfellow
patent: 4510465 (1985-04-01), Rice et al.
patent: 4970472 (1990-11-01), Kennedy et al.
patent: 4975662 (1990-12-01), Takeuchi
patent: 5144264 (1992-09-01), Chong et al.
patent: 5185584 (1993-02-01), Takeuchi
patent: 5272453 (1993-12-01), Traynor et al.
patent: 5339050 (1994-08-01), Llewellyn
patent: 5410571 (1995-04-01), Yonekawa et al.
patent: 5438299 (1995-08-01), Shimada et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System and method for phase lock loop gain stabilization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for phase lock loop gain stabilization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for phase lock loop gain stabilization will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-709198

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.