System and method for performing on-chip synchronization of...

Details System and method for performing on-chip synchronization of... System and method for performing on-chip synchronization of...

2007-10-23

2007-10-23

Bocure, Tesfaldet (Department: 2611)

Pulse or digital communications

Synchronizers

C375S356000, C375S371000, C375S376000

Reexamination Certificate

active

10340408

ABSTRACT:
Aspects of the invention provide a method end system for reducing signal distortion within an on-chip transceiver module. In response to receipt of a signal bearing at least one external clock frequency, at least one harmonic signal of the signal bearing the at least one external clock frequency may be generated. At least one synchronization clock frequency signal may be created from the generated at least one harmonic signal. The synchronization clock frequency signal may subsequently be supplied to at least one power source. Accordingly, the at least one power source may serve as an input power source to at least one on-chip system component of the transceiver module. In this regard, an output of the at least one power source may have at least a frequency attribute of the synchronization clock frequency signal. The synchronization clock frequency signal may reduce signal distortion produced by the at least one power source.

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patent: 6265709 (2001-07-01), Olson et al.
patent: 6611150 (2003-08-01), Stevens
patent: 2003/0053170 (2003-03-01), Levinson et al.
patent: 1 204 214 (2002-05-01), None
patent: 995 366 (1983-02-01), None

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