System and method for parallel execution of data generation...

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

Reexamination Certificate

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Details

C345S557000, C345S419000, C711S122000, C382S233000

Reexamination Certificate

active

06862027

ABSTRACT:
A CPU module includes a host element configured to perform a high-level host-related task, and one or more data-generating processing elements configured to perform a data-generating task associated with the high-level host-related task. Each data-generating processing element includes logic configured to receive input data, and logic configured to process the input data to produce output data. The amount of output data is greater than an amount of input data, and the ratio of the amount of input data to the amount of output data defines a decompression ratio. In one implementation, the high-level host-related task performed by the host element pertains to a high-level graphics processing task, and the data-generating task pertains to the generation of geometry data (such as triangle vertices) for use within the high-level graphics processing task. The CPU module can transfer the output data to a GPU module via at least one locked set of a cache memory. The GPU retrieves the output data from the locked set, and periodically forwards a tail pointer to a cacheable location within the data-generating elements that informs the data-generating elements of its progress in retrieving the output data.

REFERENCES:
patent: 5842004 (1998-11-01), Deering et al.
patent: 20020057850 (2002-05-01), Sirohey et al.
Dominic Mallinson, Inside Playstation 2: Architecture, Graphic Rendering and Programming, accessible at http://www.bringyou.to/games/PS2.htm, accessed on Feb. 2, 2004.
Game Console Buying Guide, accessible at http://www.viewz.com/shoppingguide/consoleprint.htm, accessed on Feb. 2, 2004.

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