Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2000-04-26
2002-03-26
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S253000, C323S313000, C323S314000
Reexamination Certificate
active
06362688
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to operational amplifiers, and in particular, to a system and method for optimal biasing of a telescopic cascode operational transconductance amplifier (OTA).
BACKGROUND OF THE INVENTION
Telescopic cascode operational transconductance amplifiers (OTAs) have gained wide popularity in the field of integrated circuit design. The reason for its popularity is that telescopic cascode OTAs generally have higher speed to current consumption ratios. That is, telescope cascode OTAs generally require lesser amount of current to achieve a given operational bandwidth as compared to other types of operational amplifiers. One undesirable characteristic of telescope cascode OTAs is that they typically have a relatively small input common mode voltage range, as will be explained in more detail with reference to FIG.
1
.
FIG. 1
illustrates a schematic diagram of an exemplary prior art portion of a telescope cascode OTAs
100
. The telescopic cascode OTA
100
consists of positive and negative input NMOS transistors M
1
and M
2
, a tail current NMOS transistor M
9
, negative and positive output transistors M
3
and M
4
, bias transistor B
1
for biasing the gates of input transistors M
1
and M
2
, and bias transistor B
2
for biasing the gate of the tail current transistor M
9
. For this example, assume that the current density for transistors B
2
, M
1
, M
2
and M
9
are substantially the same. That is, these transistors have substantially the same I/(W/L), where I is the drain current, and W and L are respectively the width and length of the transistor channel. Also, assume that the current density for bias transistor B
1
is six times that of transistors B
2
, M
1
, M
2
and M
9
, i.e. I/(W/6L).
Given these conditions, the voltage provided to the gates of transistors M
1
and M
2
provided by bias transistor B
1
is given by the following equation:
Vg
(
B1
)
=
Vt
+
2
I
μ
Cox
W
6
L
Equation
1
where Vt is the device threshold voltage, &mgr; is the mobility of the device channel, and Cox is the gate capacitance per unit area. The number 6 is a typical scaling factor for the device channel of transistor B
1
. Accordingly, the drain-to-source voltage (Vds) for the tail current transistor M
9
is given by the following equation:
Vds
(
M9
)
=
Vt
+
2
I
μ
Cox
W
6
L
-
Vgs
(
M1
or
M2
)
Equation
2
The gate-to-source voltage (Vgs) of transistors M
1
and M
2
is given by the following equation:
Vgs
(
M1
or
M2
)
=
Vt
+
2
I
μ
Cox
W
L
Equation
3
Combining equations 2 and 3, the drain-to-source voltage (Vds) for the tail current transistor M
9
is given by the following relationship:
Vds
(
M9
)
=
(
6
-
1
)
2
I
μ
Cox
W
L
Equation
4
The minimum drain-to-source voltage which causes saturation of the drain current designated as Vdsat is given by the following equation:
Vdsat
(
M9
)
=
Vgs
-
Vt
=
2
I
μ
Cox
W
L
Equation
5
Combining equations 4 and 5, the degree to which the tail current transistor M
9
is in saturation is given by Vds−Vdsat, which is given by the following relationship:
Vds
-
Vdsat
(
M9
)
=
(
6
-
2
)
2
I
μ
Cox
W
L
Equation
6
Typically, Vds−Vdsat is set to approximately 100 mVolts for transistor M
9
at typical process parameters, room temperature and nominal bias current I.
Equation 6 demonstrates that the degree to which the current tail transistor M
9
is in saturation is dependent on several process parameters such as the mobility &mgr; of the device channel and the gate capacitance per unit area Cox. The mobility &mgr; of the device channel also strongly depends on temperature. Thus, the degree to which the transistor M
9
is in saturation (i.e. Vds−Vdsat) depends not only on process variations but also on temperature variations. For instance, at relatively hot temperatures and slow process corner (typically termed in the art as “slow process corner at hot”), the mobility &mgr; of the device channel and the gate capacitance per unit area Cox are relatively small. Whereas, at relatively cold temperature and fast process corner (typically termed in the art as “fast process corner at cold”), the mobility &mgr; of the device channel and the gate capacitance per unit area Cox are relatively large. This process and temperature dependent saturation characteristic Vds−Vdsat also applies to transistors M
1
and M
2
. Further, if the bias current I is also adjustable so that the amplifier bandwidth can be adjusted, the Vds−Vdsat variation is further aggravated.
Because the degree to which transistors M
1
, M
2
and M
9
are in saturation is dependent on process and temperature variations, the input common mode voltage range for the telescopic cascode OTA
100
is similarly affected. This presents a problem for the telescopic cascode OTA since it generally has a relatively small input common mode voltage range. If &Dgr;V is defined as Vds−Vdsat for transistors M
1
, M
2
and M
9
, then the input common mode range for the telescopic cascode OTA
100
is given by +/−&Dgr;V. For instance, if the amplifier
100
input voltages (IP, IN) drop more than &Dgr;V due to, for example, switch charge injection and/or clock feedthrough, the tail current transistor M
9
would enter the linear region and the tail current is reduced. This has the negative effect of decreasing the operating bandwidth for the amplifier
100
. On the other hand, if the amplifier
100
input voltages (IP, IN) rises more than &Dgr;V due to, for example, switch charge injection and/or clock feedthrough, the input transistors M
1
and M
2
would enter the linear region. This has the negative effects of decreasing the output impedance, the DC gain and accuracy of the amplifier
100
.
This problem can be solved by making &Dgr;V=Vds−Vdsat large enough to take into account variations in the input voltages so that transistors M
1
, M
2
and M
9
do not enter the linear region under all conditions. However, making &Dgr;V=Vds−Vdsat relatively large has negative consequences. For instance, the higher &Dgr;V=Vds−Vdsat is made, the lower is the output voltage swing of the amplifier
100
. Thus, there is a need for a system and method of keeping &Dgr;V=Vds−Vdsat for transistors M
1
, M
2
and M
9
relatively constant to prevent the transistors from entering their linear region, and relatively low to minimize the effect on the output swing of the amplifier. Such as system and method is provided herein in accordance with the invention.
SUMMARY OF THE INVENTION
One aspect of the invention includes a system and method of biasing a telescopic cascode operational transconductance amplifier to prevent or reduce the likelihood that the inputs to the amplifier exceed the common mode voltage range for the amplifier. The system and method provides a bias control circuit for the input differential transistors and tail current transistor of the operational amplifier such that their respective Vds−Vdsat is maintained substantially constant. To accomplish this, the biasing system and method uses a bandgap voltage source that typically produces a highly stable voltage that is substantially temperature and process invariant. The bandgap voltage source is used to generate bias voltages applied to the gates and drains of the input differential transistors that maintains their and the tail current transistor's Vds−Vdsat substantially constant.
There are several advantages of the system and method for biasing a telescopic cascode OTA. First, by keeping Vds−Vdsat substantially constant for the tail current transistor, this transistor is prevented from operating in its linear
Blakely , Sokoloff, Taylor & Zafman LLP
Maxim Integrated Products Inc.
Nguyen Patricia T.
Pascal Robert
LandOfFree
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