System and method for non-contact electrical testing...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – For fault location

Reexamination Certificate

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C324S529000, C324S530000, C324S658000, C324S750010, C703S004000

Reexamination Certificate

active

06759850

ABSTRACT:

FIELD OF THE INVENTION
The following invention generally relates to systems and methods employed in the electrical testing of printed circuit boards and more particularly to systems and methods for generating a map of electrical signals that correspond to electrical signals to be received by sensors during the electrical testing of printed circuit boards.
BACKGROUND OF THE INVENTION
It is well known to test printed circuit boards and various other electrical circuit substrates for electrical defects.
The following U.S. patents describe systems and methods for non-contact electrical testing of printed circuit boards: U.S. Pat. Nos. 5,517,110, 5,218,294, 5,424,633 and 6,201,398, each of which is incorporated herein by reference.
The following published PCT patent application describes additional systems and methods for non-contact electrical testing of printed circuit boards: WO 99/65287, corresponding to copending U.S. patent application Ser. No. 09/719,753, incorporated herein by reference.
In systems for the inspection and/or testing of printed circuit boards a reference is employed to assist in determining whether a tested printed circuit board has been fabricated with a defect.
Various software tools for simulating electromagnetic fields are commercially available. These tools include, for example, packages available from Vector Fields Ltd. of Oxford, England and from Ansoft Corporation of Pittsburgh, Pa. These commercially available tools offer methodologies which are highly accurate when simulating electromagnetic fields and signals for small systems. However these commercially available tools are not suited for preparing references that are readily usable to perform non-contact electrical testing of complicated printed circuit boards, inter alia because they do not produce results that are readily usable in electrical testing systems and because they are much too resource intensive to be used for simulating electromagnetic fields on an entire printed circuit board during inspection.
SUMMARY OF INVENTION
The present invention seeks to provide systems and methods useful for simulating sensed electromagnetic values, such as an electrical current at a plurality of sensors positioned in proximity to an electro-magnetically stimulated article. These simulated electromagnetic values are compared with corresponding electromagnetic values sensed during electrical testing in order to detect defects. Embodiments of the invention are particularly suited for forecasting electro-magnetic values that are usable in the testing of electrically stimulated printed circuit boards. The sensors may be positioned in a fixed array relative to a board under test (BUT), or scanned across the BUT, in order to generate a collection of values representative of the BUT.
As used in this description, the term BUT means any suitable article to be tested, including, but not limited to, printed circuit boards, multi-chip modules, hybrid circuits, flat panel displays and semiconductor devices.
In accordance with a broad aspect of the invention, a reference of forecast electromagnetic values are calculated using computer files employed during the manufacture of the PCBs or other devices. The computer files include files that correspond, respectively, to a BUT and to an array of sensors employed to electrically test the BUT. Alternatively and additionally, a first portion of the forecast values are calculated using computer files containing information that corresponds to a first spatial orientation between a BUT and the sensors, and a second portion of the forecast values are calculated using the computer files containing information that corresponds to a second spatial orientation between a BUT and the sensors. A sequential change in relative orientations between the computer files may be used to simulate scanning.
In accordance with a particular embodiment of the invention, a capacitance matrix is calculated, from computer files for (1) a BUT, (2) a sensor board including an array of sensors, and (3) other testing system parts arranged in a predetermined orientation relative to the BUT. Charge and/or current at various sensors on the sensor board is derived from the capacitance matrix. Sequential calculations are performed to account for changing respective orientations of the BUT, sensor board and other testing parts, which occur, for example during scanning. These calculations facilitate simulating the scanning of a BUT by an array of sensors.
In accordance with another particular embodiment of the invention, a capacitance matrix is calculated in reliance on an assumption that charge density is distributed in a given manner over an entire conductive element. A net forming part of an electrical circuit pattern may include several conductive elements, such as a pad, annular ring, via, trace and the like. Charge density however may be, and typically is, different for each conductive element on the BUT (including conductive elements on the same net) and in the testing system and thus needs to be calculated for each conductive element. The inventors have found, however, that by treating each conductive element as a unit, calculation of simulated signals at an array of sensors is significantly simplified. Surprisingly such assumptions render a reasonable approximation of the signals output by sensors when compared to actual measurements or computation using conventional methods, which rely on calculating an actual charge density at a multiplicity of elemental regions of an article.
In accordance with another particular embodiment of the invention it is assumed that the charge density over an entire conductive element is uniformly distributed on that conductive element. Optionally, it may be assumed that the charge density is distributed over a conductive element in accordance with a predetermined function, for example a function indicating that there is a charge density fall-off at some parts of a conductive elements, such as those conductive elements or parts which are located close to the end of a net.
In accordance with another particular embodiment of the invention, current at sensors is computed for an electro-magnetically stimulated BUT by determining a voltage at various nets, and then computing current as a function of plate capacitance. Nets typically include several conductive elements. Moreover, some of the nets are located on the BUT and some of the nets are in the testing system.
In another particular embodiment of the invention, in addition to nets which are vertically aligned, the contribution to current of non-vertically aligned nets, and/or the contribution to current of fringe fields between stimulators and sensors optionally are taken into consideration.
Fringe fields are affected, inter alia, by the geometry of nets on a BUT. In a particular embodiment of the invention comprising a scanning testing system, the geometry of nets affecting fringe fields changes due to the change of the relative position between a BUT and the testing system. Thus, the contribution of fringe fields as a result of these dynamic changes in geometry is factored into the calculation of current at sensors in the testing system.
In accordance with another particular embodiment of the invention, charge, voltage, current, or other electro-magnetic characteristic, is calculated for a sequence of mutual orientations between a printed circuit board under test on the one hand, and the sensor board and other system parts on the other hand. The sequence of orientations corresponds to sampling intervals during transportation of a BUT through an electrical testing system. Optionally, transportation of the BUT may be accounted for, and calculated, parametrically. The calculated values are collected into a map of values which can be used as a reference in an electrical testing system.


REFERENCES:
patent: 4613866 (1986-09-01), Blood
patent: 5218294 (1993-06-01), Soiferman
patent: 5424633 (1995-06-01), Soiferman
patent: 5486753 (1996-01-01), Khazam et al.
patent: 5517110 (1996-05-01), Soiferman
patent: 6129459 (2000-10-01), Kis

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