Electrical computers and digital processing systems: multicomput – Master/slave computer controlling
Reexamination Certificate
1999-12-17
2003-12-23
Lim, Krisna (Department: 2153)
Electrical computers and digital processing systems: multicomput
Master/slave computer controlling
C709S223000, C714S046000
Reexamination Certificate
active
06668275
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention is related generally to the field of microprocessors. More particularly, the present invention is related to the management of multiprocessors and/or distributed multiprocessor systems.
Multiple interconnected and/or interdependent processor systems generally range from a multiprocessor system with relatively low bandwidth interconnects to systems where higher bandwidth interconnects are desired. In both environments, and in particular where multiprocessor systems provide low bandwidth interconnects with distributed software across the multiple processors, there is a need for systems and/or methods for integrating, testing and debugging and/or management of distributed, interdependent systems.
An example of a multiprocessor system having interdependencies is the U.S. Army's Crusader Advanced Field Artillery System (AFAS), which is a self-propelled military Howitzer. The Crusader electronics system includes a dozen separate modules, each having two or three processor cards that are interconnected and mostly dependent on each other. The software that runs each module is dependent on software in most of the other modules. Integration (e.g., timing synchronization), maintenance (testing and debugging) and operational management (e.g., communication and/or synchronized program execution) in multiprocessor environments is difficult in light of the these interdependencies. All of the modules in a multiprocessor systems typically have to be synchronized to operate and communicate properly. An operator or technician may need to be able to test parts of the entire interdependent system without other interdependent modules being affected (e.g., ceasing operation).
The current multiprocessor solution for management, and to ensure proper synchronization and operation, is to essentially break a system into separate modules/components and test each module separately. With current systems and methods, modules are each tested one at a time while everything else in the system is simulated. Current systems and methods generally handle one processor and/or associated modules at a time.
What is needed are apparatuses and methods that enable reliable integration, synchronization, maintenance and management of complex multiprocessor systems without interruption of the entire system's operation.
BRIEF SUMMARY OF THE INVENTION
The following summary of the invention is provided to facilitate an understanding of some of the innovative features unique to the present invention, and is not intended to be a full description. A full appreciation of the various aspects of the invention can be gained by taking the entire specification, claims, drawings, and abstract as a whole.
The present invention provides a system for managing the operation and maintenance of complex multiprocessor systems. In accordance with one aspect of the present invention, a system is disclosed for managing a multiprocessor system includes a core processor in communication with at least one remote processor or process or thread or tasks running on at least one machine. A core processor interacts with the distributed processes through internal or external communication channels such as messaging queues, packets, block transfers or shared memory schemes. The core provides test, synchronization, logging, and management operations to the distributed processors. An agent engine such as a script interpreter, associated with the core, provides operation-related data and software from a combination of user interfaces and databases to the core during its interaction with the distributed processors. Target agents associated with the distributed processors receive commands from the core. Target agents can access a library module for an extended command set for processor management.
In accordance with another aspect of the present invention, parts of a complex system can be simulated in hardware and/or software, integrated or standalone, in order to maintain integration and synchronization, while the simulated part is being serviced (e.g, tested, maintained and/or debugged).
In yet another aspect of the present invention, staged testing of distributed processors belonging to the multiprocessor system allows different pieces of a multiprocessor system to be phased out while the multiprocessor system simulates the missing component. Furthermore, necessary modules of the entire system can be simulated to the module undergoing testing. Testing of modules can proceed one at a time or in plurality because all or part of the entire system can be simulated in the test environment.
The novel features of the present invention will become apparent to those of skill in the art upon examination of the following detailed description of the invention or can be learned by practice of the present invention. It should be understood, however, that the detailed description of the invention and the specific examples presented, while indicating certain embodiments of the present invention, are provided for illustration purposes only because various changes and modifications within the spirit and scope of the invention will become apparent to those of skill in the art from the detailed description of the invention and claims that follow.
REFERENCES:
patent: 3629831 (1971-12-01), Mikus et al.
patent: 5319775 (1994-06-01), Loges et al.
patent: 5812780 (1998-09-01), Chen et al.
patent: 5881219 (1999-03-01), Leung et al.
patent: 5961594 (1999-10-01), Bouvier et al.
patent: 5983001 (1999-11-01), Boughner et al.
patent: RE36444 (1999-12-01), Sanchez-Frank et al.
patent: 6003083 (1999-12-01), Davies et al.
patent: 6014673 (2000-01-01), Davis et al.
patent: 6061725 (2000-05-01), Schwaller et al.
patent: 6085243 (2000-07-01), Fletcher et al.
patent: 6101539 (2000-08-01), Kennelly et al.
patent: 6112015 (2000-08-01), Planas et al.
patent: 6199099 (2001-03-01), Gershman et al.
patent: 6237039 (2001-05-01), Perlman
patent: 6243832 (2001-06-01), Eckes et al.
patent: 6317786 (2001-11-01), Yamane et al.
patent: 6377993 (2002-04-01), Brandt et al.
patent: 6381641 (2002-04-01), Iwasaki
patent: 6434513 (2002-08-01), Sherman et al.
patent: 6502131 (2002-12-01), Vaid et al.
patent: 2001/0056483 (2001-12-01), Davis et al.
patent: 2313457 (1997-11-01), None
patent: 2313457 (1997-11-01), None
patent: WO 94/06078 (1994-03-01), None
patent: WO 0013456 (2000-03-01), None
User interface development and software environments: The Chiron-1 system, Keller et al, 1991, IEEE, Pp. 208-218.
Alsup David Andrew
Martinez Steven D.
Honeywell International , Inc.
Lim Krisna
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