System and method for multiplying in a data processing system

Details System and method for multiplying in a data processing system System and method for multiplying in a data processing system

1995-06-07

1998-06-23

Ngo, Chuong Dinh

Boots, shoes, and leggings

364757, 36476001, G06F 752

Patent

active

057711860

ABSTRACT:
A multiplier circuit within a CPU has its selections of partial products reordered in a unique manner so that shift left capabilities are eliminated and the hardware is required to only perform shift right operations. This allows for reduced circuit sizes in several components within the multiplier circuit in order to save area, speed computation time, and reduce power consumption on the chip.

REFERENCES:
patent: 4202039 (1980-05-01), Epenoy et al.
patent: 4208722 (1980-06-01), Rasala et al.
patent: 4598382 (1986-07-01), Sato
patent: 4718031 (1988-01-01), Nukiyama
patent: 4893268 (1990-01-01), Denman, Jr. et al.
patent: 4969118 (1990-11-01), Montoye et al.
patent: 5008850 (1991-04-01), Jensen
patent: 5095456 (1992-03-01), Wong et al.
patent: 5220525 (1993-06-01), Anderson et al.
patent: 5253195 (1993-10-01), Broker et al.
patent: 5303176 (1994-04-01), Hrusecky et al.
patent: 5465226 (1995-11-01), Goto

Affiliated with

Also associated with

Rating

System and method for multiplying in a data processing system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for multiplying in a data processing system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for multiplying in a data processing system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1399145