System and method for multiple modem traffic redirection

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S401000

Reexamination Certificate

active

06614794

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to communication systems. More particularly, the present system relates to the packet assembly and disassembly associated with packet switched networks.
BACKGROUND OF THE INVENTION
Various systems have been adopted to carry digitally-encoded signals for communication applications, such as, telephone, video, and data services. These systems are often connection-oriented packet mode transmission systems, such as, asynchronous transfer mode (ATM) systems, frame relay systems, X.25 systems, or other transmission systems. Connection-oriented systems (e.g., ATM systems) have been employed in private and public communication systems or networks (e.g., wide area networks (WANs)) to transfer packetized signals (e.g., data cells or protocol data units) across communication lines, such as, telephone lines, cables, optical fibers, air waves, satellite links, or other communication media.
Generally, ATM systems are comprised of nodes or elements which communicate information between each other to ultimately transfer information form a source to a destination. The node or element can be an ATM switch, a hub, ATM interface, edge device, computer equipment, communication device or any apparatus for relaying information.
ATM systems are typically coupled to telephones, modems, other networks, or other communication devices through a port or edge device. The edge device receives data cells from the ATM system and provides data units representing the cells to the systems coupled thereto. Additionally, the edge device receives data units from the systems coupled thereto and provides data cells representative of the data units to the ATM system. Thus, the edge device can provide translation and routing functions, such as adaptation, segmentation, and reassembly operations to interface the systems coupled to it to the ATM system. The edge device often must adapt the data cells of the ATM system to the formats of the systems coupled thereto. The edge device can be an adapting network interface card, an adapting hub, an adapting switch, an adapting concentrator, an ATM desktop device, a router access multiplexer, or other interface device.
One type of ATM system is, for example, an ATM-based telephone system. In an ATM-based telephone system, information in the form of cells is transmitted from subscriber equipment (telephone, modem, or other communication device) modem to a remote access server. Each of the cells contains headers identifying the calling and receiving stations and also contains a payload providing the information being transmitted and received. The cells pass from the calling equipment modem through an access multiplexer to a remote access server. The cells then pass through the remote access server to an intermediate or a destination server for routing to a desired destination. During the transfer of the cells to the destination, the headers may be changed. These changes in the address indicate the path that the cell is following to reach the receiving equipment.
In conventional systems, to reassemble cells into signals at the access multiplexer, the header and the payload in each cell have been transferred to a control memory where the header is processed to determine what path it came from so that the signal can be reassembled based upon this path. This has created certain difficulties. For example, it has required the control memory to be relatively large, particularly since the memory receives the header and the payload. It has also caused the transfer to be slow, particularly since the header and the payload have to be processed and the payload is generally twelve times longer than the header.
Systems for, and methods of, overcoming the disadvantages discussed above exist. For example, U.S. Pat. No. 5,768,275, issued on Jun. 16, 1998, to Lincoln et al., entitled “Controller for ATM Segmentation and Reassembly,” the disclosure of which is incorporated herein by reference (hereinafter referred to as the “Lincoln System”) discloses one such system. An embodiment of the Lincoln System reduces the time for processing the cells to update the headers as the cells are transferred through the telephone lines between the calling telephone (or other device) and the receiving telephone (or other device).
In one embodiment of the Lincoln System, a header and a payload in a cell are separated for transfer between a cell interface and a host memory. The header is transferred to a control memory. For transfer to the host memory, the control memory initially provides a host-memory region address and the region length. The payload is recorded in such region address. The control memory also provides a second host-memory region address, and length, when the payload length exceeds the payload length in the first region address. For transfer from the host memory to the cell interface, the control memory provides a host memory region address. The cell interface passes the payload from such region address.
Packet or cell processing by large numbers of modems (or other communication devices) located in central locations, cause data communication traffic to become congested through a node, edge device, or element in the ATM system. Such congestion results in data bottlenecks, which degrade communication performance and efficiency. Bottlenecks have become an increasing problem as Internet access has shifted from small points of presence (POPs) to large mega-POPs.
One data communication bottleneck in particular is the host processor located at the remote access server. The host processor links port devices to segmentation and reassembly (SAR) units or other network devices and processes cell headers and payloads. Processing of headers and payloads place a certain load on the host processor. When the host processor is unable to process headers and payloads as fast as they arrive, data bottleneck can occur and data communication speed decreases.
Thus, there is a need for direct communication between port devices and SAR units without transmission of all data traffic to and from a central host processor. Further, there is a need to avoid the bottlenecking of data traffic to and from a central host processor and, thus, decrease the load on the central host processor. Even further, there is a need for multiple hosts to communicate with a single communication device. Even further, there is a need for providing a single device capable of improved communication, whereby data traffic is increased without an ever-increasing level of computing power in some centralized or difficult to distribute resource.
SUMMARY OF THE INVENTION
One embodiment of the invention relates to a communication system for communication of data packets associated with a packet switched network. The system includes a port processor, a segmentation and reassembly device, and a host processor. The port processor communicates data packets to and from at least one communication device and at least one destination.
The segmentation and reassembly device routes data packets to and from the port processor and the at least one destination. The host processor establishes a virtual circuit between the port processor and the segmentation and reassembly device. The host processor further directs the port processor to communicate data traffic to the segmentation and reassembly device via the virtual circuit, whereby the port processor and segmentation and reassembly device exchange data directly via the virtual circuit without per-packet handling by the host processor of all data traffic.
Another embodiment of the invention relates to a communication system for communication of data packets associated with a packet switched network. The system includes a means for communicating data packets to and from at least one communication device and a destination; a means for routing data packets to and from the destination; and a means for establishing a virtual circuit between the means for communicating data packets and the means for routing data packets, and for directing the means for communicati

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