System and method for minimizing noise on a dynamic node

Details System and method for minimizing noise on a dynamic node System and method for minimizing noise on a dynamic node

2006-09-05

2006-09-05

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C711S108000

Reexamination Certificate

active

07102904

ABSTRACT:
A circuit for comparing a first match line and a second match line in a CAM circuit. The circuit includes a first keeper circuit having a first input coupled to the second match line and a second keeper circuit having a second input coupled to the first match line. The circuit also includes a third keeper circuit and a fourth keeper circuit. The first and third keeper circuits are coupled to the first match line so as to be capable of maintaining a first voltage level on the first match line. The second and fourth keeper circuits are coupled to the second match line so as to be capable of maintaining a second voltage level on the second match line.

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David A. Patterson, John L. Hennessy, “The Basic of Caches”,Computer Organization&Design The Hardware/Software Interface, Second Edition, pages: Cover of Book, Book Information page, p. 557.

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