System and method for measuring on-chip supply noise

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Parameter related to the reproduction or fidelity of a...

Reexamination Certificate

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Reexamination Certificate

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07365548

ABSTRACT:
A method and system for measuring noise of an on-chip power supply. In an embodiment, the system comprises a delay line that receives as an input a signal such as a square wave. The delay line may comprise a series of inverters connected to the power supply. The output of the delay line may combine the input signal and the noise signal from the power supply to produce a series of delayed versions of the input signal. Analysis of the output signal yields characteristics associated with the noise signal of the power supply such as its spectrum. In another embodiment, the system may comprise at least one mixer that modulates an input signal, such as a sinusoid, with the noise signal of the power supply. Demodulating the mixed signal then yields the noise signal of the power supply for further analysis.

REFERENCES:
patent: 6603293 (2003-08-01), Knoedgen
patent: 6717445 (2004-04-01), Nair
patent: 6823293 (2004-11-01), Chen et al.
patent: 2005/0122138 (2005-06-01), Chansungsan et al.
patent: 2006/0214672 (2006-09-01), Jenkins et al.
patent: WO 2004/077315 (2004-09-01), None

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