Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements
Reexamination Certificate
2007-09-11
2007-09-11
Kinkead, Arnold (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Afc with logic elements
C331S016000, C331SDIG002
Reexamination Certificate
active
11137072
ABSTRACT:
Systems and methods for detecting phase-locked loop circuit lock. In particular, a lock detector configured to detect PLL stability for a user-defined period of time prior to asserting a PLL-lock-detected output. Stability may be indicated by a counter inserted into a PLL circuit and arranged between a phase-frequency detector and a charge pump. Because the counter value is acted upon by the phase-frequency detector, PLL lock is indicated by counter value stability. The digital counter value may be provided to a digital charge pump and a lock detector simultaneously. The lock detector includes registers and difference detectors to determine when the difference between counter values is below a user-defined tolerance. The lock detector may include a variable timer to avoid false indications of lock which may occur when counter values are sampled with the same frequency as a fluctuation frequency of the counter value.
REFERENCES:
patent: 6714083 (2004-03-01), Ishibashi
patent: 6794944 (2004-09-01), Hirai
patent: 7116145 (2006-10-01), Kim et al.
Kabushiki Kaisha Toshiba
Kinkead Arnold
Sprinkle IP Law Group
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