Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Reexamination Certificate
2006-04-11
2006-04-11
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
C712S225000
Reexamination Certificate
active
07028166
ABSTRACT:
A system may include a memory file, which includes an entry configured to store a first addressing pattern and a first tag, and an execution core coupled to the memory file. The memory file may be configured to compare the first addressing pattern included in the entry to a second addressing pattern of a load operation. If the second addressing pattern matches the first addressing pattern stored in the entry, the memory file is configured to link a data value identified by the first tag to a speculative result of the load operation. The execution core is configured to access the speculative result when executing a second operation that is dependent on the load operation.
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Advanced Micro Devices , Inc.
Coleman Eric
Kowert Robert C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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