System and method for interleaving memory banks

Details System and method for interleaving memory banks System and method for interleaving memory banks

1995-05-01

1996-11-26

Fears, Terrell W.

Static information storage and retrieval

Addressing

Multiplexing

36518902, 36523001, G11C 1300

Patent

active

055792774

ABSTRACT:
A device and method are provided for mapping address bus bits to memory address by using interleaved and non-interleaved modes so that every desired row and column configuration stored in a register file may be supported. Also, the device and method allow a combination of interleaved and non-interleaved memory bank pairs to be used by registering row and column address in a plurality of registers corresponding to interleaved and non-interleaved combinations. In particular, the memory bank pairs which are capable of being interleaved have the interleaved operation performed automatically while the memory bank pairs which cannot be interleaved have the non-interleaved operation performed thereon. As a result, the performance of the memory is enhanced while eliminating the amount of user interface necessary.

REFERENCES:
patent: 3753242 (1973-08-01), Townsend
patent: 4908798 (1990-03-01), Urai

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