System and method for interfacing a transport decoder to a bitra

Details System and method for interfacing a transport decoder to a bitra System and method for interfacing a transport decoder to a bitra

1996-03-29

1998-09-22

Hudspeth, David R.

Data processing: speech signal processing, linguistics, language

Speech signal processing

For storage or transmission

370474, G10L 302, G10L 900, H04J 300

Patent

active

058129766

ABSTRACT:
A transport decoder 110, for receiving and processing a transport data stream using MPEG-2 formats, includes connections to a physical layer channel interface (channel interface) 112, a buffer memory 114, a host microprocessor 116, audio and video decoders 118/120, and clock signal circuitry 122. To properly interface to a bitrate-constrained audio decoder, the PES headers of received data are stripped and parsed (step 530), a frame time is determined (step 532), the timer begins running (step 534), audio processors 226/228 burst out a frame of data (step 536) and audio processors 226/228 pause (step 538). After the burst, the audio processor determines (step 540) if more audio frames are available in the current packet. If more frames are available, control transfers to (step 534) and the process continues as outlined above. If there are no more frames in the PES packet, then, (step 542) is executed in which the audio processor gets the next PES packet from the memory 114 and transfers control to (step 530) to process the audio frames in the new PES packet.

REFERENCES:
patent: 5557538 (1996-09-01), Retter et al.
patent: 5583562 (1996-12-01), Birch et al.
patent: 5598415 (1997-01-01), Nuber et al.
patent: 5621772 (1997-04-01), Maturi et al.
patent: 5623314 (1997-04-01), Retter et al.
patent: 5652749 (1997-07-01), Davenport et al.
Zoran Corporation, "Six Channel Dolby Digital Surround Processor", ZR38500, Nov., 1994, pp. 1-28.

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