Coating apparatus – Gas or vapor deposition – Multizone chamber
Reexamination Certificate
2001-01-11
2004-08-24
Hassanzadeh, Parviz (Department: 1763)
Coating apparatus
Gas or vapor deposition
Multizone chamber
C156S345310, C156S345320, C414S936000
Reexamination Certificate
active
06780250
ABSTRACT:
TECHNICAL FIELD OF THE PRESENT INVENTION
This invention relates generally to the field of semiconductor processing and more particularly to a system and method for integrated oxide removal and processing of a semiconductor wafer.
BACKGROUND OF THE PRESENT INVENTION
Conventional process systems used in the production of microelectronic devices usually include a process module that utilizes a transfer chamber or loadlock module to align and/or center a semiconductor wafer to improve and/or monitor the accuracy of film processing. The process module is used for the purpose of intentionally growing and/or depositing layers of film onto a semiconductor wafer. Each step in the process system requires interfacing between modules to ensure quality of the microelectronic device and provides an opportunity for an oxide layer to form or re-form on the wafer.
The presence of an oxide layer with an unknown composition usually affects both electrical as well as physical properties of the film being deposited or grown, reducing the quality of the microelectronic device. For example, these layers may inhibit good contact with a silicon (Si) substrate, leading to poor epitaxial Si growth. They may also reduce a resultant dielectric quality, resulting in lower capacitance and current leakage in the microelectronic device. In polysilicon films, these layers may result in higher resistance than expected, thus affecting the operation of the microelectronic circuit. Furthermore, the layers may reduce the uniformity of film layers as well as undesirably increase the final thickness of the microelectronic device.
One approach to the oxide removal problem includes the use of high temperature processing within the processing module. For example, the surface of a wafer may be etched using a hydrogen anneal or baking process at a high temperature. However, this process requires the use of high temperatures and typically results in a non-uniform surface and/or potential damage to the wafer. Moreover, each of these processes requires either separate equipment or an additional step in processing. This additional step undesirably introduces an opportunity for further oxidation to occur.
Because hardware such as stainless steel or quartz within either a high quality thermal process or transfer chamber module are incompatible with any gas or etch process, approaches to the oxide removal problem typically include use of a separate oxide layer removal module. For example, a separate wet etch module may be used to remove an oxide layer from a wafer by immersing the wafer into a solution, such as hydrofluoric acid (HF). However, this type of processing is difficult to control and typically produces an undesirably uneven wafer surface. Other approaches may utilize a separate module for coating either a single wafer or a batch of wafers with a vaporous solution. However, each of these approaches undesirably introduces an additional step or interface into the process system. Therefore, it is desirable to ensure the effective removal of interfacial oxides without introducing unnecessary steps into the processing of semiconductor wafers.
SUMMARY OF THE PRESENT INVENTION
From the foregoing, it may be appreciated that a need has arisen for providing an efficient method for effectively removing layers of interfacial oxide from a semiconductor wafer. In accordance with the present invention, a system and method for integrated oxide removal and processing of a semiconductor wafer are provided that substantially eliminate or reduce disadvantages and problems of conventional systems.
According to an embodiment of the present invention, there is provided an integrated oxide removal and processing system that includes a process module that may intentionally add at least one film layer to a single semiconductor wafer. The integrated oxide removal and processing system also includes a transfer chamber module used to align the semiconductor wafer for the process module. The transfer chamber module may expose the semiconductor wafer to a vaporous solution that is inert with respect to the semiconductor wafer and operable to remove an oxide layer therefrom. More specifically, the semiconductor wafer includes a Si substrate. In a further embodiment, the vaporous solution includes hydrofluoric acid (HF). In yet a further embodiment, the vaporous solution includes 0.049% to 49% HF.
The present invention provides several important technical advantages over conventional systems. Various embodiments of the present invention may include none, some, or all of these advantages. One technical advantage of the present invention is that it may reduce the number of processing steps required to create a microelectronic device. This advantage may further reduce the occurrence of subsequent oxidation after a first oxide layer removal. Another technical advantage of the present invention is that it reduces interfaces between separate modules in semiconductor wafer processing systems and thus reduces system complexity. Yet another technical advantage of the present invention is that it provides control over the oxide removal process, thereby reducing a risk of detrimental affects on electrical and physical properties of the film being deposited or grown.
Yet another technical advantage of the present invention is that it may provide improved electrical contact to subsequent films grown or deposited on a semiconductor wafer. Another technical advantage of the present invention is that it may be done at room temperature rather than at a high temperature and does not require reduced pressure to remove chemical oxide layers. Yet another technical advantage of the present invention is that it may reduce the final thickness of the microelectronic device. Yet another technical advantage of the present invention is that it may reduce the processing time necessary to create the microelectronic device. Other technical advantages may be readily ascertainable by those skilled in the art from the following figures, description, and claims.
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Applied Materials Presentation, Jun. 19, 2002.
Brady III W. James
Hassanzadeh Parviz
Keagy Rose Alyssa
Moore Karla
Telecky , Jr. Frederick J.
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