System and method for increasing the output data throughput of a

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G06F 300

Patent

active

042131766

ABSTRACT:
A circuit and method for increasing the output data per unit time from a computer to its associated peripheral terminals or utilization devices is disclosed in which the computer output address and data lines are time multiplexed by a novel decoding technique which enables the address bits and data bits to be interpreted together to form a new data word having a number of bits equal to the sum of the original data bits and the address bits interpreted as data bits. A plurality of decoders, each at a peripheral terminal and each having an identification address code, enable a window for decoding multiple transfers of data on output address and data lines, said window having a predetermined time duration during which all other peripheral identification address codes are locked out, until the data transfer is completed.
A microprocessor embodying the invention is also disclosed in which the output data capability is increased from eight to sixteen bits without hardware modification to the microprocessor.

REFERENCES:
patent: 3558811 (1971-01-01), Montevecchio et al.
patent: 3891971 (1975-06-01), Hirvela et al.
patent: 3909790 (1975-09-01), Shapiro et al.
patent: 3924240 (1975-12-01), Given
patent: 3938098 (1976-02-01), Garlic
patent: 3990049 (1976-11-01), Wirth
patent: 4017841 (1977-04-01), Jensen

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