System and method for high-speed decoding and ISI...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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C375S350000

Reexamination Certificate

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07466751

ABSTRACT:
A method and a system for providing ISI compensation to an input signal in a bifurcated manner. ISI compensation is provided in two stages, a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel. First stage ISI compensation is performed in an inverse response filter having a characteristic feedback gain factor K, during system start-up. Second stage ISI compensation is performed by a single DFE in combination with a MDFE operating on tentative decisions output from a Viterbi decoder. As the DFE of the second stage reaches convergence, the feedback gain factor K of the first stage is ramped to zero.

REFERENCES:
patent: 4328585 (1982-05-01), Monsen
patent: 4631735 (1986-12-01), Qureshi
patent: 5249200 (1993-09-01), Chen et al.
patent: 5249205 (1993-09-01), Chennakeshu et al.
patent: 5283811 (1994-02-01), Chennakeshu et al.
patent: 5353310 (1994-10-01), Russell et al.
patent: 5367536 (1994-11-01), Tsujimoto
patent: 5509032 (1996-04-01), Bond
patent: 5604769 (1997-02-01), Wang
patent: 5638409 (1997-06-01), Awata et al.
patent: 5777914 (1998-07-01), Larsson et al.
patent: 5784415 (1998-07-01), Chevillat et al.
patent: 5809071 (1998-09-01), Kobayashi et al.
patent: 5870438 (1999-02-01), Olafsson
patent: 5914987 (1999-06-01), Fogel
patent: 5991349 (1999-11-01), Chen
patent: 6009120 (1999-12-01), Nobakht
patent: 6055119 (2000-04-01), Lee
patent: 6177951 (2001-01-01), Ghosh
patent: 6249544 (2001-06-01), Azazzi et al.
patent: 6272569 (2001-08-01), Nordling
patent: 6504867 (2003-01-01), Efstathiou
patent: 0206770 (1986-12-01), None
patent: 0778687 (1997-06-01), None
patent: 0889612 (1999-01-01), None
Bergmans J W et al, “On the Use of Decision Feedback for Simplifying the Viterbi Detector” , Philips Journal of Research, Nov. 23, 1987, pp. 399-428, vol. 42 No. 4, XP000565157, Amsterdam,The Netherlands.
Haratsch E, “High-Speed VLSI Implementation of Reduced Complexity Sequence Estimation Algorithms with Application to Gigabit Ethernet 100Base-T”, International Symposium on VLSI Technology, Systems and Applications, Piscataway, NJ, USA, Jun. 8-10, 1999, pp. 171-174, XP002136642.
Raheli R, “Per Survivor Processing: A General Approach to MLSE in Uncertain Environments”, IEEE Transactions on Communications, New York, USA, Feb. 1995, pp. 354-364, vol. 43 No. 2-4, XP002059868.

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