Electrical computers and digital processing systems: processing – Instruction issuing
Reexamination Certificate
2005-08-16
2008-05-06
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
C712S216000, C712S217000, C712S218000
Reexamination Certificate
active
07370176
ABSTRACT:
A system and method for a high frequency stall design is presented. An issue unit includes a first instruction stage, a second instruction stage, and issue control logic. During a first instruction cycle, the issue unit performs two tasks, which are 1) the instructions located in the first instruction stage are moved to a second instruction stage, and 2) the issue control logic determines whether to issue or stall the instructions that are moved to the second instruction stage based upon their particular instruction attributes and the issue control unit's previous state. During a second instruction cycle that immediately follows the first instruction cycle, the second instruction stage's instructions are either issued or stalled based upon the issue control logic's decision from the first instruction cycle.
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DeMent Jonathan James
Feiste Kurt Alan
Philhower Robert Alan
Shippy David
Chan Eddie
Rifai D'Ann N.
Van Leeuwen & Van Leeuwen
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