System and method for generating header error control byte...

Details System and method for generating header error control byte... System and method for generating header error control byte...

2004-09-22

2009-08-25

Kizou, Hassan (Department: 2419)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S476000, C712S022000

Reexamination Certificate

active

07580412

ABSTRACT:
In an Asynchronous Transfer Mode cell, a method and apparatus are disclosed for producing a cell header having bytes with bits in reverse order. Address and control data bytes are received, and a value for a reverse bit Header Error Control byte is generated from the address and control data bytes. Additionally, the order of bits within each address and control data byte is reversed. The produced cell header comprises the reverse bit Header Error Control byte and the address and control data bytes with each address and control data byte having its bits in reversed order. In one embodiment, the present invention provides a processor instruction for producing the cell header having bytes with bits in reverse order. The instruction receives as input address and control data bytes. The instruction then computes a Header Error Control byte and formats the Header Error Control byte in reverse bit order for subsequent processing within the modem. Additionally, the instruction also reverses the bit-order of each byte of the cell header's address and control fields for subsequent processing within the modem.

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