System and method for faceting the corners of a resistor...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S538000, C257SE21004

Reexamination Certificate

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07982287

ABSTRACT:
A system and method is disclosed for providing a resistor protect layer to protect a thin film resistor in a semiconductor device. A thin film resistor is formed on a dielectric layer and a resistor protect layer is placed over the thin film resistor. An etch procedure is employed to facet the corners of the resistor protect layer. The faceted corners of the resistor protect layer reduce the step height of the resistor protect layer. Then a conductor is deposited over the resistor protect layer and the dielectric layer. When portions of the conductor are subsequently etched away, the resistor protect layer protects the underlying thin film resistor from being exposed to the etch process.

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patent: 2004/0012071 (2004-01-01), Ido et al.
patent: 2007/0037386 (2007-02-01), Williams
Thomas Bold, et al., “System and Method for Faceting a Masking Layer in a Plasma Etch to Slope a Feature Edge”, U.S. Appl. No. 11/285,702, filed Nov. 21, 2005.

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